From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B467813B592; Mon, 19 Aug 2024 09:51:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724061110; cv=none; b=En2rS5GGJ25Kep+G6ZS+8A3bU0GKr9Ajo6VBB0AxNx32Xo+5DWV7UkWG8cRooRDRBf6Qoq/S6+22Cap6y7PNWWO/cP5KYl5FD/BJS25xlMPL0tk15YQAQJ97qg8ETrwbC7VZ9PSfmKX8KrBbE1HDeDXeGgVRYjq/bSix3GbbzrM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724061110; c=relaxed/simple; bh=wgWy6oxFKRj+OpPXXDQFpun2GPwOwcekxCuQMmQ98y0=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=mJbYljFtC3syAzlyWgvcmSLHJFYU8Q54+24Nm4cALBgPzXVAX95SQK7it+mFVlVZrZVD+3C/MtxBlAG78alXmevSMxgp9tuir78GRQVhr+wPicIDURRGM64UD2jZibIsD7lKhC/LzmTenRV4puOr1sGbNO4F9UN3XYHjU/L1udo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=dD3C811g; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dD3C811g" Received: by smtp.kernel.org (Postfix) with ESMTPSA id F0668C32782; Mon, 19 Aug 2024 09:51:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724061110; bh=wgWy6oxFKRj+OpPXXDQFpun2GPwOwcekxCuQMmQ98y0=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=dD3C811g7v5Y9DUKpGMd/NlYHbpOZG7HKnGHZdF60myXYj32cO0UH/XWqqT1di5PY p1hduqCK2djslkrJ/TLpPpXyiRXlFUCyiuE8Ha9Rffo/OiD/UzMGgs2ykd0xF+Woxb 7weMt+45JyxMh6vnEsTzH4SFNBcIv6zXZsoOPZxndiK3b67+QaDODvxeU/KDPEkidL OhU8ozW770goqBavmNYPEkO4zfh2wnbTAaXA3k9jB7jmi2Qw4s5JRRPm1JaeLjWkK3 btksjYqZ//V+wQvpTIfyVFpVnTPrIjuchVV80lD46sOh4uFdfyK16T4hijlTkwiL8x Ji8uc/pQyIEWA== Message-ID: Date: Mon, 19 Aug 2024 11:51:41 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/5] dt-bindings: arm: Add Coresight TMC Control Unit hardware To: JieGan Cc: Rob Herring , Suzuki K Poulose , Mike Leach , James Clark , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Jinlong Mao , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Tingwei Zhang , Yuanfang Zhang , Tao Zhang , Song Chai , linux-arm-msm@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com References: <20240812024141.2867655-1-quic_jiegan@quicinc.com> <20240812024141.2867655-4-quic_jiegan@quicinc.com> <20240818142834.GA27754-robh@kernel.org> <9d9704ed-6ef8-4920-9874-29e0a815e2ba@kernel.org> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 19/08/2024 10:51, JieGan wrote: > On Mon, Aug 19, 2024 at 08:25:33AM +0200, Krzysztof Kozlowski wrote: >> On 19/08/2024 03:49, JieGan wrote: >>> On Sun, Aug 18, 2024 at 08:28:34AM -0600, Rob Herring wrote: >>>> On Mon, Aug 12, 2024 at 10:41:39AM +0800, Jie Gan wrote: >>>>> Add binding file to specify how to define a Coresight TMC >>>>> Control Unit device in device tree. >>>>> >>>>> It is responsible for controlling the data filter function >>>>> based on the source device's Trace ID for TMC ETR device. >>>>> The trace data with that Trace id can get into ETR's buffer >>>>> while other trace data gets ignored. >>>>> >>>>> Signed-off-by: Jie Gan >>>>> --- >>>>> .../bindings/arm/qcom,coresight-ctcu.yaml | 79 +++++++++++++++++++ >>>>> 1 file changed, 79 insertions(+) >>>>> create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml >>>>> >>>>> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml >>>>> new file mode 100644 >>>>> index 000000000000..7a9580007942 >>>>> --- /dev/null >>>>> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml >>>>> @@ -0,0 +1,79 @@ >>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>>>> +%YAML 1.2 >>>>> +--- >>>>> +$id: http://devicetree.org/schemas/arm/qcom,coresight-ctcu.yaml# >>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>>>> + >>>>> +title: CoreSight TMC Control Unit >>>>> + >>>>> +maintainers: >>>>> + - Yuanfang Zhang >>>>> + - Mao Jinlong >>>>> + - Jie Gan >>>>> + >>>>> +description: >>>>> + The Coresight TMC Control unit controls various Coresight behaviors. >>>>> + It works as a helper device when connected to TMC ETR device. >>>>> + It is responsible for controlling the data filter function based on >>>>> + the source device's Trace ID for TMC ETR device. The trace data with >>>>> + that Trace id can get into ETR's buffer while other trace data gets >>>>> + ignored. >>>> >>>> Nowhere is TMC defined. >>> The Coresight TMC control unit(CTCU) connected to Coresight TMC device via replicator and >>> works as a helper device to TMC device. >> >> Did you understand the feedback or just responding with whatever to get >> rid of reviewers? > > Sorry for the insufficient clarity in my response, I am just misunderstood the feedback and try > to explain the relationship between TMC and CTCU device. > > I will add the TMC description to explain what TMC is as shown below: > The Trace Memory Controller(TMC) is used for Embedded Trace Buffer(ETB), Embedded Trace FIFO(ETF) > and Embedded Trace Router(ETR) configurations. The configuration mode (ETB, ETF, ETR) is > discovered at boot time when the device is probed. Thanks. > >> >>> >>> The in-ports listed below illustrate their connection to TMC devices. >>> >>>> >>>>> + >>>>> +properties: >>>>> + compatible: >>>>> + enum: >>>>> + - qcom,sa8775p-ctcu >>>>> + >>>>> + reg: >>>>> + maxItems: 1 >>>>> + >>>>> + clocks: >>>>> + maxItems: 1 >>>>> + >>>>> + clock-names: >>>>> + items: >>>>> + - const: apb >>>>> + >>>>> + in-ports: >>>> >>>> Use 'ports' unless you have both in and out ports. >>> The ‘in-ports’ and ‘out-ports’ properties will be parsed by ‘of_coresight_get_port_parent’ >>> and their relationships to other devices will be stored in the coresight_platform_data structure. >>> >>> for example: >>> struct coresight_platform_data { >>> int nr_inconns; >>> int nr_outconns; >>> struct coresight_connection **out_conns; >>> struct coresight_connection **in_conns; >>> }; >>> >>> https://elixir.bootlin.com/linux/v6.11-rc4/source/drivers/hwtracing/coresight/coresight-platform.c#L147 >> >> and? If you respond with some unrelated argument, we will respond with >> the same: Use 'ports' unless you have both in and out ports. > > Sorry for the insufficient response. > > The Coresight driver prefers using ‘in-ports’ and ‘out-ports’ instead of the ‘ports’ property, as each > Coresight component needs to specify its input and output directions. > > The Coresight system operates by integrating all Coresight components and construting its data flow path > based on the defined directions. > > Consequently, the data flow direction cannot be determined when utilizing the ‘ports’ property in the > Coresight system. It can be determined. Driver knows that there are only in-ports, so you cannot have here other direction. Maybe the drivers have somehow this hard-coded? But that's a bit annoying limitation. Best regards, Krzysztof