From: Robin Murphy <robin.murphy@arm.com>
To: "ishii.shuuichir@fujitsu.com" <ishii.shuuichir@fujitsu.com>,
"will@kernel.org" <will@kernel.org>,
"joro@8bytes.org" <joro@8bytes.org>,
"thunder.leizhen@huawei.com" <thunder.leizhen@huawei.com>,
"jgg@ziepe.ca" <jgg@ziepe.ca>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"chenxiang66@hisilicon.com" <chenxiang66@hisilicon.com>,
"christophe.jaillet@wanadoo.fr" <christophe.jaillet@wanadoo.fr>,
"john.garry@huawei.com" <john.garry@huawei.com>,
"baolu.lu@linux.intel.com" <baolu.lu@linux.intel.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"iommu@lists.linux.dev" <iommu@lists.linux.dev>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] iommu/arm-smmu-v3: fixed check process for disable_bypass module parameter
Date: Wed, 3 Aug 2022 13:54:01 +0100 [thread overview]
Message-ID: <d14dd7d2-e144-6d1b-7450-a68330c8cbb6@arm.com> (raw)
In-Reply-To: <TYCPR01MB6160FF56DA7F9DEB2841C656E99C9@TYCPR01MB6160.jpnprd01.prod.outlook.com>
On 2022-08-03 13:45, ishii.shuuichir@fujitsu.com wrote:
> Hi, Robin,
> Thank you for your comments.
>
>>> /* Enable the SMMU interface, or ensure bypass */
>>> - if (!bypass || disable_bypass) {
>>> + if (!bypass && disable_bypass) {
>>
>> This change looks obviously wrong - if bypass is false here then we definitely
>> want to enable the SMMU, so disable_bypass is irrelevant. It shouldn't even be
>> possible to get here with bypass==true under ACPI, since
>> arm_smmu_device_acpi_probe() cannot fail :/
>
> Sorry, my understanding of the meaning of the disable_bypass module parameter
> and the process of setting GBPA_ABORT was insufficient.
>
> I misunderstood that the disable_bypass module parameter is used to simply
> bypass (disable) SMMU (SMMU_CR0.SMMUEN == 0 and SMMU_GBPA.ABORT == 0).
> Forget about the fixes in this patch.
>
> Although our understanding was lacking,
> we thought it would be a good idea to have a module parameter that simply disables SMMU,
> so we were considering a fix.
Right, disable_bypass is a security/robustness feature for when the
driver *is* in use. If for some reason you want to disable the SMMU
drivers completely, they are regular driver model drivers, so just don't
load the module in the first place (or use initcall_blacklist if it's
built-in).
Thanks,
Robin.
>
> Best regards,
> Shuuichirou.
>
>> -----Original Message-----
>> From: Robin Murphy <robin.murphy@arm.com>
>> Sent: Wednesday, August 3, 2022 6:26 PM
>> To: Ishii, Shuuichirou/石井 周一郎 <ishii.shuuichir@fujitsu.com>;
>> will@kernel.org; joro@8bytes.org; thunder.leizhen@huawei.com; jgg@ziepe.ca;
>> tglx@linutronix.de; chenxiang66@hisilicon.com; christophe.jaillet@wanadoo.fr;
>> john.garry@huawei.com; baolu.lu@linux.intel.com;
>> linux-arm-kernel@lists.infradead.org; iommu@lists.linux.dev;
>> linux-kernel@vger.kernel.org
>> Subject: Re: [PATCH] iommu/arm-smmu-v3: fixed check process for
>> disable_bypass module parameter
>>
>> On 2022-08-03 00:42, Shuuichirou Ishii wrote:
>>> The current process does not enable the bypass setting regardless of
>>> the value of the disable_bypass module parameter when ACPI is enabled,
>>> so the value of the disable_bypass module parameter has been corrected
>>> so that it is handled correctly.
>>>
>>> Signed-off-by: Shuuichirou Ishii <ishii.shuuichir@fujitsu.com>
>>> ---
>>> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>>> b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>>> index 88817a3376ef..256d7b2a83a7 100644
>>> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>>> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>>> @@ -3396,7 +3396,7 @@ static int arm_smmu_device_reset(struct
>> arm_smmu_device *smmu, bool bypass)
>>> enables &= ~(CR0_EVTQEN | CR0_PRIQEN);
>>>
>>> /* Enable the SMMU interface, or ensure bypass */
>>> - if (!bypass || disable_bypass) {
>>> + if (!bypass && disable_bypass) {
>>
>> This change looks obviously wrong - if bypass is false here then we definitely
>> want to enable the SMMU, so disable_bypass is irrelevant. It shouldn't even be
>> possible to get here with bypass==true under ACPI, since
>> arm_smmu_device_acpi_probe() cannot fail :/
>> Robin.
>>
>>> enables |= CR0_SMMUEN;
>>> } else {
>>> ret = arm_smmu_update_gbpa(smmu, 0, GBPA_ABORT);
prev parent reply other threads:[~2022-08-03 12:54 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-02 23:42 [PATCH] iommu/arm-smmu-v3: fixed check process for disable_bypass module parameter Shuuichirou Ishii
2022-08-03 9:25 ` Robin Murphy
2022-08-03 12:45 ` ishii.shuuichir
2022-08-03 12:54 ` Robin Murphy [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d14dd7d2-e144-6d1b-7450-a68330c8cbb6@arm.com \
--to=robin.murphy@arm.com \
--cc=baolu.lu@linux.intel.com \
--cc=chenxiang66@hisilicon.com \
--cc=christophe.jaillet@wanadoo.fr \
--cc=iommu@lists.linux.dev \
--cc=ishii.shuuichir@fujitsu.com \
--cc=jgg@ziepe.ca \
--cc=john.garry@huawei.com \
--cc=joro@8bytes.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=tglx@linutronix.de \
--cc=thunder.leizhen@huawei.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox