Re: [PATCH 05/24] arm64: dts: qcom: glymur: Add cpu idle states

Maulik Shah (mkshah)
2025-10-13T09:29:55Z

On 9/25/2025 3:55 PM, Konrad Dybcio wrote:
> On 9/25/25 8:32 AM, Pankaj Patil wrote:
>> From: Maulik Shah <maulik.shah@oss.qualcomm.com>
>>
>> Add CPU power domains
>
> The commit message could say something about what kind of states
> are being added, what their impact on the running system is, etc..

This will be squashed with cpus node.
>
> [...]
>
>> + idle-states {
>> + entry-method = "psci";
>> +
>> + CLUSTER0_C4: cpu-sleep-0 {
>> + compatible = "arm,idle-state";
>> + idle-state-name = "ret";
>> + arm,psci-suspend-param = <0x00000004>;
>> + entry-latency-us = <180>;
>> + exit-latency-us = <320>;
>> + min-residency-us = <1000>;
>> + };
>> +
>> + CLUSTER1_C4: cpu-sleep-1 {
>> + compatible = "arm,idle-state";
>> + idle-state-name = "ret";
>> + arm,psci-suspend-param = <0x00000004>;
>> + entry-latency-us = <180>;
>> + exit-latency-us = <320>;
>> + min-residency-us = <1000>;
>> + };
>> +
>> + CLUSTER2_C4: cpu-sleep-2 {
>> + compatible = "arm,idle-state";
>> + idle-state-name = "ret";
>> + arm,psci-suspend-param = <0x00000004>;
>> + entry-latency-us = <180>;
>> + exit-latency-us = <320>;
>> + min-residency-us = <1000>;
>> + };
>
> All three are identical (should they be?), just call it CPU_C4 and de-
> duplicate it (unless the framework would read that as "all CPUs in the
> system must sleep at the same time" which I don't know if it would)

Updated to call cpu_c4, cluster_cl5 and domain_ss3 (inline with SM8750).

>
>> +
>> + cluster0_cl5: cluster-sleep-0 {
>> + compatible = "domain-idle-state";
>> + idle-state-name = "ret";
>> + arm,psci-suspend-param = <0x01000054>;
>> + entry-latency-us = <2000>;
>> + exit-latency-us = <2000>;
>> + min-residency-us = <9000>;
>> + };
>> +
>> + cluster1_cl5: cluster-sleep-1 {
>> + compatible = "domain-idle-state";
>> + idle-state-name = "ret";
>> + arm,psci-suspend-param = <0x01000054>;
>> + entry-latency-us = <2000>;
>> + exit-latency-us = <2000>;
>> + min-residency-us = <9000>;
>> + };
>> +
>> + cluster2_cl5: cluster-sleep-2 {
>> + compatible = "domain-idle-state";
>> + idle-state-name = "ret";
>> + arm,psci-suspend-param = <0x01000054>;
>> + entry-latency-us = <2000>;
>> + exit-latency-us = <2000>;
>> + min-residency-us = <9000>;
>> + };
>
> ditto

Updated in next revision.

>
>> +
>> + APSS_OFF: cluster-ss3 {
>
> labels must be lowercase

Updated in next revision.

>
>> + compatible = "domain-idle-state";
>> + idle-state-name = "apps-pc";
>> + entry-latency-us = <2800>;
>> + exit-latency-us = <4400>;
>> + min-residency-us = <10150>;
>> + arm,psci-suspend-param = <0x0200C354>;
>
> lowercase hex, please
>
> also, this node oddly puts arm,psci-suspend-param at a different place,
> please align it with the prvious ones

Both updated in next revision.

>
> [...]
>
>> + CLUSTER3_PD: power-domain-cpu-cluster3 {
>
> "SYSTEM_PD"?

Updated in next revision.

>> + #power-domain-cells = <0>;
>> + domain-idle-states = <&APSS_OFF>;
>
> Does it make sense to include some shallower idle states?

Shallower idle states for cluster (CL4) and system (SS1) did not give benefits for power/performance.

Thanks,
Maulik

>
> Konrad