From: Krzysztof Kozlowski <krzk@kernel.org>
To: Jingyi Wang <quic_jingyw@quicinc.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>
Cc: quic_tengfan@quicinc.com, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, quic_tingweiz@quicinc.com,
quic_aiquny@quicinc.com,
Zhenhua Huang <quic_zhenhuah@quicinc.com>,
Xin Liu <quic_liuxin@quicinc.com>,
Kyle Deng <quic_chunkaid@quicinc.com>,
Tingguo Cheng <quic_tingguoc@quicinc.com>,
Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Subject: Re: [PATCH v2 3/4] arm64: dts: qcom: add initial support for QCS8300 DTSI
Date: Wed, 25 Sep 2024 16:04:47 +0200 [thread overview]
Message-ID: <d263a06a-506a-408c-b9b3-4bfb7f386bc0@kernel.org> (raw)
In-Reply-To: <20240925-qcs8300_initial_dtsi-v2-3-494c40fa2a42@quicinc.com>
On 25/09/2024 12:43, Jingyi Wang wrote:
> Add initial DTSI for QCS8300 SoC.
>
> Features added in this revision:
> - CPUs with PSCI idle states
> - Interrupt-controller with PDC wakeup support
> - Timers, TCSR Clock Controllers
> - Reserved Shared memory
> - GCC and RPMHCC
> - TLMM
> - Interconnect
> - QuP with uart
> - SMMU
> - QFPROM
> - Rpmhpd power controller
> - UFS
> - Inter-Processor Communication Controller
> - SRAM
> - Remoteprocs including ADSP,CDSP and GPDSP
> - BWMONs
>
> [Zhenhua: added the smmu node]
> Co-developed-by: Zhenhua Huang <quic_zhenhuah@quicinc.com>
> Signed-off-by: Zhenhua Huang <quic_zhenhuah@quicinc.com>
> [Xin: added ufs/adsp/gpdsp nodes]
> Co-developed-by: Xin Liu <quic_liuxin@quicinc.com>
> Signed-off-by: Xin Liu <quic_liuxin@quicinc.com>
> [Kyle: added the aoss_qmp node]
> Co-developed-by: Kyle Deng <quic_chunkaid@quicinc.com>
> Signed-off-by: Kyle Deng <quic_chunkaid@quicinc.com>
> [Tingguo: added the rpmhpd nodes]
> Co-developed-by: Tingguo Cheng <quic_tingguoc@quicinc.com>
> Signed-off-by: Tingguo Cheng <quic_tingguoc@quicinc.com>
> [Raviteja: added interconnect nodes]
> Co-developed-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
> Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
> ---
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Best regards,
Krzysztof
next prev parent reply other threads:[~2024-09-25 14:04 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-25 10:43 [PATCH v2 0/4] Add initial support for QCS8300 SoC and QCS8300 RIDE board Jingyi Wang
2024-09-25 10:43 ` [PATCH v2 1/4] dt-bindings: arm: qcom: document QCS8300 SoC and reference board Jingyi Wang
2024-09-25 14:02 ` Krzysztof Kozlowski
2024-09-25 10:43 ` [PATCH v2 2/4] arm64: defconfig: enable clock controller, interconnect and pinctrl for QCS8300 Jingyi Wang
2024-09-25 14:03 ` Krzysztof Kozlowski
2024-09-25 10:43 ` [PATCH v2 3/4] arm64: dts: qcom: add initial support for QCS8300 DTSI Jingyi Wang
2024-09-25 14:04 ` Krzysztof Kozlowski [this message]
2024-11-26 18:13 ` Bjorn Andersson
2024-11-28 8:24 ` Jingyi Wang
2024-11-27 9:43 ` Krzysztof Kozlowski
2024-09-25 10:43 ` [PATCH v2 4/4] arm64: dts: qcom: add base QCS8300 RIDE dts Jingyi Wang
2024-09-25 14:05 ` Krzysztof Kozlowski
2024-09-28 2:00 ` kernel test robot
2024-09-29 2:31 ` Jingyi Wang
2024-09-25 14:01 ` [PATCH v2 0/4] Add initial support for QCS8300 SoC and QCS8300 RIDE board Krzysztof Kozlowski
2024-11-27 9:40 ` Krzysztof Kozlowski
2024-11-28 8:26 ` Jingyi Wang
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