From: "CK Hu (胡俊光)" <ck.hu@mediatek.com>
To: "jassisinghbrar@gmail.com" <jassisinghbrar@gmail.com>,
"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
"Jason-JH Lin (林睿祥)" <Jason-JH.Lin@mediatek.com>,
"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Singo Chang (張興國)" <Singo.Chang@mediatek.com>,
"linux-mediatek@lists.infradead.org"
<linux-mediatek@lists.infradead.org>,
"Jason-ch Chen (陳建豪)" <Jason-ch.Chen@mediatek.com>,
"Shawn Sung (宋孝謙)" <Shawn.Sung@mediatek.com>,
"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"angelogioacchino.delregno@collabora.com"
<angelogioacchino.delregno@collabora.com>
Subject: Re: [RESEND, PATCH 3/5] soc: mediatek: mtk-cmdq: Add cmdq_pkt_poll_addr() function
Date: Mon, 4 Mar 2024 03:11:50 +0000 [thread overview]
Message-ID: <d33fc25f014785d21ff7bac3f00a48e7621b810e.camel@mediatek.com> (raw)
In-Reply-To: <20240301144403.2977-4-jason-jh.lin@mediatek.com>
Hi, Jason:
On Fri, 2024-03-01 at 22:44 +0800, Jason-JH.Lin wrote:
> Add cmdq_pkt_poll_addr function to support CMDQ user making
> an instruction for polling a specific address of hardware rigster
> to check the value with or without mask.
>
> POLL is an old operation in GCE, so it does not support SPR and
> CMDQ_CODE_LOGIC. CMDQ users need to use GPR and CMDQ_CODE_MASK
> to move polling register address to GPR to make an instruction.
> This will be done in cmdq_pkt_poll_addr().
>
> Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 38
> ++++++++++++++++++++++++++
> include/linux/soc/mediatek/mtk-cmdq.h | 16 +++++++++++
> 2 files changed, 54 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c
> b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 3a1e47ad8a41..2e9fc9bb1183 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -12,6 +12,7 @@
>
> #define CMDQ_WRITE_ENABLE_MASK BIT(0)
> #define CMDQ_POLL_ENABLE_MASK BIT(0)
> +#define CMDQ_POLL_HIGH_ADDR_GPR (14)
I think there are multiple GPR and you use #14 to store high addr. I
would like you to list all GPR and do not limit the usage of each GPR.
The question is, why limit #14 to be high addr? If the GPR is shared by
all threads, there should be a mechanism to manage GPR usage for client
driver to allocate/free GPR.
> #define CMDQ_EOC_IRQ_EN BIT(0)
> #define CMDQ_REG_TYPE 1
> #define CMDQ_JUMP_RELATIVE 1
> @@ -406,6 +407,43 @@ int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8
> subsys,
> }
> EXPORT_SYMBOL(cmdq_pkt_poll_mask);
>
> +int cmdq_pkt_poll_addr(struct cmdq_pkt *pkt, dma_addr_t addr, u32
> value, u32 mask)
> +{
> + struct cmdq_instruction inst = { {0} };
> + int err;
> + u8 use_mask = 0;
> +
> + if (mask != U32_MAX) {
> + inst.op = CMDQ_CODE_MASK;
> + inst.mask = ~mask;
> + err = cmdq_pkt_append_command(pkt, inst);
> + if (err != 0)
> + return err;
> + use_mask = CMDQ_POLL_ENABLE_MASK;
> + }
> +
> + /*
> + * POLL is an old operation in GCE and it does not support SPR
> and CMDQ_CODE_LOGIC,
> + * so it can not use cmdq_pkt_assign to keep polling register
> address to SPR.
> + * It needs to use GPR and CMDQ_CODE_MASK to move polling
> register address to GPR.
> + */
> + inst.op = CMDQ_CODE_MASK;
> + inst.dst_t = CMDQ_REG_TYPE;
> + inst.sop = CMDQ_POLL_HIGH_ADDR_GPR;
> + inst.mask = addr;
This is full address, not high address. Why name the GPR to
CMDQ_POLL_HIGH_ADDR_GPR?
The addr is not mask, so I would like inst.value = addr.
Regards,
CK
> + err = cmdq_pkt_append_command(pkt, inst);
> + if (err < 0)
> + return err;
> +
> + inst.op = CMDQ_CODE_POLL;
> + inst.dst_t = CMDQ_REG_TYPE;
> + inst.sop = CMDQ_POLL_HIGH_ADDR_GPR;
> + inst.offset = use_mask;
> + inst.value = value;
> + return cmdq_pkt_append_command(pkt, inst);
> +}
> +EXPORT_SYMBOL(cmdq_pkt_poll_addr);
> +
> int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value)
> {
> struct cmdq_instruction inst = {};
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h
> b/include/linux/soc/mediatek/mtk-cmdq.h
> index b6dbe2d8f16a..2fe9be240fbc 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -253,6 +253,22 @@ int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8
> subsys,
> int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
> u16 offset, u32 value, u32 mask);
>
> +/**
> + * cmdq_pkt_poll_addr() - Append polling command to the CMDQ packet,
> ask GCE to
> + * execute an instruction that wait for a
> specified
> + * address of hardware register to check for the
> value
> + * w/ or w/o mask.
> + * All GCE hardware threads will be blocked by
> this
> + * instruction.
> + * @pkt: the CMDQ packet
> + * @addr: the hardware register address
> + * @value: the specified target register value
> + * @mask: the specified target register mask
> + *
> + * Return: 0 for success; else the error code is returned
> + */
> +int cmdq_pkt_poll_addr(struct cmdq_pkt *pkt, dma_addr_t addr, u32
> value, u32 mask);
> +
> /**
> * cmdq_pkt_assign() - Append logic assign command to the CMDQ
> packet, ask GCE
> * to execute an instruction that set a constant
> value into
next prev parent reply other threads:[~2024-03-04 3:11 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-01 14:43 [RESEND, PATCH 0/5] Add CMDQ API for upcoming ISP feature Jason-JH.Lin
2024-03-01 14:43 ` [RESEND, PATCH 1/5] soc: mediatek: mtk-cmdq: Add specific purpose register definitions for GCE Jason-JH.Lin
2024-03-01 14:44 ` [RESEND, PATCH 2/5] soc: mediatek: mtk-cmdq: Add cmdq_pkt_mem_move() function Jason-JH.Lin
2024-03-04 2:39 ` CK Hu (胡俊光)
2024-03-04 15:52 ` Jason-JH Lin (林睿祥)
2024-03-01 14:44 ` [RESEND, PATCH 3/5] soc: mediatek: mtk-cmdq: Add cmdq_pkt_poll_addr() function Jason-JH.Lin
2024-03-04 3:11 ` CK Hu (胡俊光) [this message]
2024-03-04 16:04 ` Jason-JH Lin (林睿祥)
2024-03-05 3:26 ` CK Hu (胡俊光)
2024-03-05 3:37 ` Jason-JH Lin (林睿祥)
2024-03-05 3:51 ` CK Hu (胡俊光)
2024-03-05 6:23 ` Jason-JH Lin (林睿祥)
2024-03-01 14:44 ` [RESEND, PATCH 4/5] soc: mediatek: mtk-cmdq: Add cmdq_pkt_acquire_event() function Jason-JH.Lin
2024-03-04 2:11 ` CK Hu (胡俊光)
2024-03-04 15:39 ` Jason-JH Lin (林睿祥)
2024-03-01 14:44 ` [RESEND, PATCH 5/5] mailbox: mtk-cmdq: Add support runtime get and set GCE event Jason-JH.Lin
2024-03-04 2:30 ` CK Hu (胡俊光)
2024-03-04 15:50 ` Jason-JH Lin (林睿祥)
2024-03-05 3:31 ` CK Hu (胡俊光)
2024-03-05 3:43 ` Jason-JH Lin (林睿祥)
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d33fc25f014785d21ff7bac3f00a48e7621b810e.camel@mediatek.com \
--to=ck.hu@mediatek.com \
--cc=Jason-JH.Lin@mediatek.com \
--cc=Jason-ch.Chen@mediatek.com \
--cc=Nancy.Lin@mediatek.com \
--cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
--cc=Shawn.Sung@mediatek.com \
--cc=Singo.Chang@mediatek.com \
--cc=angelogioacchino.delregno@collabora.com \
--cc=chunkuang.hu@kernel.org \
--cc=jassisinghbrar@gmail.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=matthias.bgg@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox