Re: (reposting) how to get DMA'able memory within 4GB on 64-bit m achi ne

[Jes Sorensen <jes@sunsite.dk>]

>>>>> "David" == David S Miller <davem@redhat.com> writes:

David> There are so many issues with 64-bit DAC support, that many of
David> the people whining in this thread have not even considered, and
David> these very issues will be what shapes the eventual API to use.

David> For example.  I have IOMMU's on my machine, there is no real
David> need to use 64-bit DAC in %99 of cases.  In fact, DAC transfers
David> run slower because they cannot use the DMA caching in the PCI
David> controller.

David> How do you represent this with the undocumented API ia64 has
David> decided to use?  You can't convey this information to the
David> driver, because the driver may say "I don't care if it's
David> slower, I want the large addressing because otherwise I'd
David> consume or overflow the IOMMU resources".  How do you say "SAC
David> is preferred for performance" with ia64's API?  You can't.

Thats easy, you use the IOMMU in pci_alloc_consistent() and friends
and return a 32bit address in that case. Most cards will simply issue
a SAC cycle if the upper 32 bits in the DMA address are zero, the ones
that don't are broken.

This way you automatically get support for the situation Ben mentioned
as well, when doing large allocs and the IOMMU is full you return a
full 64 bit address.

Jes