From: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Thomas Gleixner <tglx@kernel.org>,
Shawn Guo <shawn.guo@linaro.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/7] irqchip/irq-qcom-mpm: Program wakeup timer when CPU cluster goes to LPM
Date: Mon, 3 Aug 2026 16:33:28 +0530 [thread overview]
Message-ID: <d5137c66-8895-4b08-a089-42e16fa211e1@oss.qualcomm.com> (raw)
In-Reply-To: <87h5m26hqv.wl-maz@kernel.org>
On 13-Jul-26 8:48 PM, Marc Zyngier wrote:
> On Mon, 13 Jul 2026 11:25:44 +0100,
> Sneh Mankad <sneh.mankad@oss.qualcomm.com> wrote:
>>
>> The next wakeup timer value needs to be set in MPM timer as the arch timer
>> interrupt can not wakeup the SoC if after the deepest CPUidle states the
>> SoC also enters deepest low power state.
>>
>> To wakeup the SoC in such scenarios the earliest wakeup time is set in MPM
>> timer and the Resource Power Manager (RPM processor) takes care of setting
>> the timer in HW.
>>
>> Add MPM timer programming when CPU cluster enters power collapse.
>>
>> Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
>> ---
>> drivers/irqchip/irq-qcom-mpm.c | 44 ++++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 44 insertions(+)
>>
>> diff --git a/drivers/irqchip/irq-qcom-mpm.c b/drivers/irqchip/irq-qcom-mpm.c
>> index 763eddee99dc4cdd5edab22ce54808528f9ef165..f43c4a1c35f78b6cdae194dc7ae88c5c307ada94 100644
>> --- a/drivers/irqchip/irq-qcom-mpm.c
>> +++ b/drivers/irqchip/irq-qcom-mpm.c
>> @@ -13,6 +13,7 @@
>> #include <linux/io.h>
>> #include <linux/irqchip.h>
>> #include <linux/irqdomain.h>
>> +#include <linux/ktime.h>
>> #include <linux/mailbox_client.h>
>> #include <linux/module.h>
>> #include <linux/of.h>
>> @@ -25,6 +26,8 @@
>> #include <linux/soc/qcom/irq.h>
>> #include <linux/spinlock.h>
>>
>> +#include <clocksource/arm_arch_timer.h>
>> +
>> /*
>> * This is the driver for Qualcomm MPM (MSM Power Manager) interrupt controller,
>> * which is commonly found on Qualcomm SoCs built on the RPM architecture.
>> @@ -77,6 +80,13 @@ enum qcom_mpm_reg {
>> MPM_REG_STATUS,
>> };
>>
>> +#define USECS_TO_CYCLES(time_usecs) xloops_to_cycles((time_usecs) * 0x10C7UL)
>> +
>> +static inline unsigned long xloops_to_cycles(u64 xloops)
>> +{
>> + return (xloops * loops_per_jiffy * HZ) >> 32;
>> +}
>> +
>
> Do we really need arch-specific code to be literally copied from
> arm64's delay.c, without any comment or attempt at making it generic?
>
> Specially after having added the same stuff to rpmh-rsc.c 4 years ago?
>
> See a pattern here?
Agreed Marc, there should be a more generic way to get this information. I will
work on it and post.
Thanks,
Sneh
next prev parent reply other threads:[~2026-08-03 11:03 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-13 10:25 [PATCH 0/7] Register MPM under CPU cluster power domain to manage RPM notification Sneh Mankad
2026-07-13 10:25 ` [PATCH 1/7] dt-bindings: interrupt-controller: mpm: Document power-domains property Sneh Mankad
2026-07-13 11:26 ` Konrad Dybcio
2026-08-03 5:28 ` Sneh Mankad
2026-07-13 15:11 ` Marc Zyngier
2026-07-15 6:38 ` Marek Szyprowski
2026-07-15 8:54 ` Marc Zyngier
2026-08-03 10:28 ` Sneh Mankad
2026-08-03 19:21 ` Dmitry Baryshkov
2026-07-21 9:06 ` Krzysztof Kozlowski
2026-08-03 5:30 ` Sneh Mankad
2026-08-03 19:21 ` Dmitry Baryshkov
2026-07-13 10:25 ` [PATCH 2/7] irqchip/irq-qcom-mpm: Register MPM under CPU cluster power domain Sneh Mankad
2026-07-15 9:46 ` Konrad Dybcio
2026-07-15 10:34 ` Stephan Gerhold
2026-07-15 10:45 ` Konrad Dybcio
2026-07-15 10:49 ` Stephan Gerhold
2026-07-15 11:11 ` Konrad Dybcio
2026-07-21 22:18 ` Dmitry Baryshkov
2026-07-22 8:29 ` Konrad Dybcio
2026-08-03 10:58 ` Sneh Mankad
2026-08-19 13:49 ` Konrad Dybcio
2026-07-13 10:25 ` [PATCH 3/7] irqchip/irq-qcom-mpm: Prepare common access path for timer and pin regs Sneh Mankad
2026-07-15 9:59 ` Konrad Dybcio
2026-07-13 10:25 ` [PATCH 4/7] irqchip/irq-qcom-mpm: Program wakeup timer when CPU cluster goes to LPM Sneh Mankad
2026-07-13 15:18 ` Marc Zyngier
2026-08-03 11:03 ` Sneh Mankad [this message]
2026-07-13 10:25 ` [PATCH 5/7] arm64: dts: qcom: sm6375: Make MPM device as part of CPU cluster domain Sneh Mankad
2026-07-13 10:25 ` [PATCH 6/7] arm64: dts: qcom: agatti: Do not mark MPM as power domain Sneh Mankad
2026-07-15 10:01 ` Konrad Dybcio
2026-07-21 22:22 ` Dmitry Baryshkov
2026-07-22 8:28 ` Konrad Dybcio
2026-07-22 12:40 ` Dmitry Baryshkov
2026-08-03 10:37 ` Sneh Mankad
2026-07-21 22:21 ` Dmitry Baryshkov
2026-07-13 10:25 ` [PATCH 7/7] arm64: dts: qcom: shikra: Add CPU idle states Sneh Mankad
2026-07-15 10:02 ` Konrad Dybcio
2026-08-03 10:33 ` Sneh Mankad
2026-08-19 13:46 ` Konrad Dybcio
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