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From: Florian Fainelli <f.fainelli@gmail.com>
To: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	viresh.kumar@linaro.org, rjw@rjwysocki.net, code@mmayer.net,
	daniel.lezcano@linaro.org
Subject: cpuidle and cpufreq coupling?
Date: Wed, 19 Jul 2017 15:54:29 -0700	[thread overview]
Message-ID: <d56144f8-cb62-a458-d69d-8e2a65cbe434@gmail.com> (raw)

Hi,

We have a particular ARM CPU design that is drawing quite a lot of
current upon exit from WFI, and it does so in a way even before the
first instruction out of WFI is executed. That means we cannot influence
directly the exit from WFI other than by changing the state in which it
would be previously entered because of this "dead" time during which the
internal logic needs to ramp up back where it left.

A naive approach to solving this problem because we have CPU frequency
scaling available would be to do the following:

- just before entering WFI, switch to a low frequency OPP
- enter WFI
- upon exit from WFI, ramp up the frequency back to e.g: highest OPP

Some of the parts that I am not exactly clear on would be:

- would that qualify as a cpuidle governor of some kind that ties in
which cpufreq?
- would using cpufreq_driver_fast_switch() be an appropriate API to use
from outside

Thanks!
-- 
Florian

             reply	other threads:[~2017-07-19 22:54 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-19 22:54 Florian Fainelli [this message]
2017-07-19 23:17 ` cpuidle and cpufreq coupling? Rafael J. Wysocki
2017-07-20  7:18   ` Viresh Kumar
2017-07-20  9:23     ` Sudeep Holla
2017-07-20 23:01       ` Florian Fainelli
2017-07-20  9:52     ` Rafael J. Wysocki
2017-07-20 14:45       ` Peter Zijlstra
2017-07-20 22:56         ` Florian Fainelli
2017-07-21  0:11           ` Vikram Mulukutla
2017-07-21  0:30             ` Florian Fainelli

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