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[37.6.170.146]) by smtp.gmail.com with ESMTPSA id s10-20020a1709060c0a00b0070beb9401d9sm10689704ejf.171.2022.07.01.09.13.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 01 Jul 2022 09:13:46 -0700 (PDT) Message-ID: Date: Fri, 1 Jul 2022 19:13:43 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH] iommu/arm-smmu-v3: Fix undefined behavior in GBPA_UPDATE Content-Language: en-US To: Will Deacon Cc: joro@8bytes.org, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org References: <20220630063959.27226-1-burzalodowa@gmail.com> <20220701143401.GA28408@willie-the-truck> From: xenia In-Reply-To: <20220701143401.GA28408@willie-the-truck> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 7/1/22 17:34, Will Deacon wrote: > On Thu, Jun 30, 2022 at 09:39:59AM +0300, Xenia Ragiadakou wrote: >> The expression 1 << 31 results in undefined behaviour because the type of >> integer constant 1 is (signed) int and the result of shifting 1 by 31 bits >> is not representable in the (signed) int type. >> >> Change the type of 1 to unsigned int by adding the U suffix. >> >> Signed-off-by: Xenia Ragiadakou >> --- >> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h >> index cd48590ada30..44fbd499edea 100644 >> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h >> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h >> @@ -96,7 +96,7 @@ >> #define CR2_E2H (1 << 0) >> >> #define ARM_SMMU_GBPA 0x44 >> -#define GBPA_UPDATE (1 << 31) >> +#define GBPA_UPDATE (1U << 31) > There are loads of these kicking around in the kernel sources and we compile > with -fno-strict-overflow. > > If you really want to change these, then let's use the BIT() macro instead, > but I think it's really just churn. > > Will Hi Will, I thought that since in commit 587e6c10a7ce89a5924fdbeff2ec524fbd6a124b there was a similar fix to Q_OVERFLOW_FLAG (see below) --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -183,7 +183,7 @@  #define Q_IDX(llq, p)                  ((p) & ((1 << (llq)->max_n_shift) - 1))  #define Q_WRP(llq, p)                  ((p) & (1 << (llq)->max_n_shift)) -#define Q_OVERFLOW_FLAG                        (1 << 31) +#define Q_OVERFLOW_FLAG                        (1U << 31)  #define Q_OVF(p)                       ((p) & Q_OVERFLOW_FLAG)  #define Q_ENT(q, p)                    ((q)->base +                    \                                          Q_IDX(&((q)->llq), p) *        \ then it would make sense to fix GBPA_UPDATE in the same way. Xenia