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From: Joshua Clayton <stillcompiling@gmail.com>
To: Alexandre Belloni <alexandre.belloni@free-electrons.com>,
	Alessandro Zummo <a.zummo@towertech.it>
Cc: rtc-linux@googlegroups.com, linux-kernel@vger.kernel.org,
	Joshua Clayton <stillcompiling@gmail.com>
Subject: [PATCH v2 4/8] rtc-pcf2123: refactor chip reset into a function
Date: Mon,  4 Jan 2016 10:31:22 -0800	[thread overview]
Message-ID: <d9c66693bdd714ea29aa432d9be3271b863d50f2.1451929910.git.stillcompiling@gmail.com> (raw)
In-Reply-To: <cover.1451928661.git.stillcompiling@gmail.com>
In-Reply-To: <0000-cover-letter.patch>

Refactor chip reset items into its own function, isolating it from
the rest of the device probe.
Subsequent commits will avoid calling this code.

Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
---
 drivers/rtc/rtc-pcf2123.c | 64 ++++++++++++++++++++++++++---------------------
 1 file changed, 36 insertions(+), 28 deletions(-)

diff --git a/drivers/rtc/rtc-pcf2123.c b/drivers/rtc/rtc-pcf2123.c
index 0f2ce45..2d886d4 100644
--- a/drivers/rtc/rtc-pcf2123.c
+++ b/drivers/rtc/rtc-pcf2123.c
@@ -272,6 +272,40 @@ static int pcf2123_rtc_set_time(struct device *dev, struct rtc_time *tm)
 	return 0;
 }
 
+static int pcf2123_reset(struct device *dev)
+{
+	int ret;
+	u8  rxbuf[2];
+
+	ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_SW_RESET);
+	if (ret < 0)
+		return ret;
+
+	/* Stop the counter */
+	dev_dbg(dev, "stopping RTC\n");
+	ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_STOP);
+	if (ret < 0)
+		return ret;
+
+	/* See if the counter was actually stopped */
+	dev_dbg(dev, "checking for presence of RTC\n");
+	ret = pcf2123_read(dev, PCF2123_REG_CTRL1, rxbuf, sizeof(rxbuf));
+	if (ret < 0)
+		return ret;
+
+	dev_dbg(dev, "received data from RTC (0x%02X 0x%02X)\n",
+		rxbuf[0], rxbuf[1]);
+	if (!(rxbuf[0] & CTRL1_STOP))
+		return -ENODEV;
+
+	/* Start the counter */
+	ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_CLEAR);
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
+
 static const struct rtc_class_ops pcf2123_rtc_ops = {
 	.read_time	= pcf2123_rtc_read_time,
 	.set_time	= pcf2123_rtc_set_time,
@@ -281,7 +315,6 @@ static int pcf2123_probe(struct spi_device *spi)
 {
 	struct rtc_device *rtc;
 	struct pcf2123_plat_data *pdata;
-	u8  rxbuf[2];
 	int ret, i;
 
 	pdata = devm_kzalloc(&spi->dev, sizeof(struct pcf2123_plat_data),
@@ -290,29 +323,9 @@ static int pcf2123_probe(struct spi_device *spi)
 		return -ENOMEM;
 	spi->dev.platform_data = pdata;
 
-	/* Send a software reset command */
-	dev_dbg(&spi->dev, "resetting RTC\n");
-	ret = pcf2123_write_reg(&spi->dev, PCF2123_REG_CTRL1, CTRL1_SW_RESET);
-	if (ret < 0)
-		goto kfree_exit;
-
-	/* Stop the counter */
-	dev_dbg(&spi->dev, "stopping RTC\n");
-	ret = pcf2123_write_reg(&spi->dev, PCF2123_REG_CTRL1, CTRL1_STOP);
-	if (ret < 0)
-		goto kfree_exit;
-
-	/* See if the counter was actually stopped */
-	dev_dbg(&spi->dev, "checking for presence of RTC\n");
-	ret = pcf2123_read(&spi->dev, PCF2123_REG_CTRL1, rxbuf, sizeof(rxbuf));
-	dev_dbg(&spi->dev, "received data from RTC (0x%02X 0x%02X)\n",
-			rxbuf[0], rxbuf[1]);
-	if (ret < 0)
-		goto kfree_exit;
-
-	if (!(rxbuf[0] & 0x20)) {
+	ret = pcf2123_reset(&spi->dev);
+	if (ret < 0) {
 		dev_err(&spi->dev, "chip not found\n");
-		ret = -ENODEV;
 		goto kfree_exit;
 	}
 
@@ -320,11 +333,6 @@ static int pcf2123_probe(struct spi_device *spi)
 	dev_info(&spi->dev, "spiclk %u KHz.\n",
 			(spi->max_speed_hz + 500) / 1000);
 
-	/* Start the counter */
-	ret = pcf2123_write_reg(&spi->dev, PCF2123_REG_CTRL1, CTRL1_CLEAR);
-	if (ret < 0)
-		goto kfree_exit;
-
 	/* Finalize the initialization */
 	rtc = devm_rtc_device_register(&spi->dev, pcf2123_driver.driver.name,
 			&pcf2123_rtc_ops, THIS_MODULE);
-- 
2.5.0


  parent reply	other threads:[~2016-01-04 18:33 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-04 18:31 [PATCH v2 0/8] rtc: enable adjustment of clock offset Joshua Clayton
     [not found] ` <0000-cover-letter.patch>
2016-01-04 18:31   ` [PATCH v2 1/8] rtc-pcf2123: define registers and bit macros Joshua Clayton
2016-01-04 18:31   ` [PATCH v2 2/8] rtc-pcf2123: clean up reads from the chip Joshua Clayton
2016-01-04 18:31   ` [PATCH v2 3/8] rtc-pcf2123: clean up writes to the rtc chip Joshua Clayton
2016-01-04 18:31   ` Joshua Clayton [this message]
2016-01-04 18:31   ` [PATCH v2 5/8] rtc-pcf2123: avoid resetting the clock if possible Joshua Clayton
2016-01-04 18:31   ` [PATCH v2 6/8] rtc: Add functions to set and read clock offset Joshua Clayton
2016-01-04 18:31   ` [PATCH v2 7/8] rtc: implement a sysfs interface for " Joshua Clayton
2016-01-31 11:41     ` Alexandre Belloni
2016-02-01 20:56       ` Joshua Clayton
2016-02-02 10:41         ` Alexandre Belloni
2016-02-03 17:16           ` [PATCH v3 1/3] rtc: Add functions to set and read rtc offset Joshua Clayton
2016-02-04 22:07             ` Alexandre Belloni
2016-02-04 23:32               ` Joshua Clayton
2016-02-05 14:39                 ` Alexandre Belloni
2016-02-05 20:41                   ` [PATCH v4 " Joshua Clayton
2016-02-05 20:41                     ` [PATCH v4 2/3] rtc: implement a sysfs interface for clock offset Joshua Clayton
2016-02-05 20:41                     ` [PATCH v4 3/3] rtc-pcf2123: implement read_offset and set_offset Joshua Clayton
2016-02-23 18:47                     ` [PATCH v4 1/3] rtc: Add functions to set and read rtc offset Joshua Clayton
2016-02-23 21:44                       ` Alexandre Belloni
2016-02-03 17:16           ` [PATCH v3 2/3] rtc: implement a sysfs interface for clock offset Joshua Clayton
2016-02-04 22:12             ` Alexandre Belloni
2016-02-03 17:16           ` [PATCH v3 3/3] rtc-pcf2123: implement read_offset and set_offset Joshua Clayton
2016-01-04 18:31   ` [PATCH v2 8/8] " Joshua Clayton
2016-01-26 14:56 ` [PATCH v2 0/8] rtc: enable adjustment of clock offset Joshua Clayton
2016-01-26 16:00   ` Alexandre Belloni
2016-01-31 11:29     ` Alexandre Belloni

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