From: Baolu Lu <baolu.lu@linux.intel.com>
To: bingbu.cao@intel.com, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, iommu@lists.linux.dev
Cc: baolu.lu@linux.intel.com, senozhatsky@chromium.org,
bingbu.cao@linux.intel.com, sangram.k.y@intel.com
Subject: Re: [RESEND PATCH v3] iommu/vt-d: Use passthrough mode for the Intel IPUs
Date: Thu, 5 Jan 2023 18:49:09 +0800 [thread overview]
Message-ID: <d9d8fba9-a53a-11ea-9b28-ee5695da48eb@linux.intel.com> (raw)
In-Reply-To: <20230105082857.4180299-1-bingbu.cao@intel.com>
On 2023/1/5 16:28, bingbu.cao@intel.com wrote:
> Intel IPU(Image Processing Unit) has its own (IO)MMU hardware,
> The IPU driver allocates its own page table that is not mapped
> via the DMA, and thus the Intel IOMMU driver blocks access giving
> this error:
>
> DMAR: DRHD: handling fault status reg 3
> DMAR: [DMA Read] Request device [00:05.0] PASID ffffffff
> fault addr 76406000 [fault reason 06] PTE Read access is not set
Do you mind telling why does such DMA fault occur? How does the IPU
driver map the fault address 76406000 ?
> As IPU is not an external facing device which is not risky, so use
> IOMMU passthrough mode for Intel IPUs.
You can also set the passthrough mode with kernel option iommu=pt
(globally) or by writing IDENTITY to
/sys/..path_to_device../iommu_group/type
(per-device).
> Fixes: 26f5689592e2 ("media: staging/intel-ipu3: mmu: Implement driver")
Please don't try to fix any problem in the device driver by adding any
hard-coded quirky code in the IOMMU code.
> Signed-off-by: Bingbu Cao<bingbu.cao@intel.com>
--
Best regards,
baolu
prev parent reply other threads:[~2023-01-05 10:49 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-05 8:28 [RESEND PATCH v3] iommu/vt-d: Use passthrough mode for the Intel IPUs bingbu.cao
2023-01-05 10:49 ` Baolu Lu [this message]
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