From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-172.mta0.migadu.com (out-172.mta0.migadu.com [91.218.175.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 451D83C5838 for ; Tue, 16 Jun 2026 04:19:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781583558; cv=none; b=e9ldENnVAQQK9BWYP5IgunU9ggL3tL7HiX01WQuKfU7wgXJvIYZ8asV/L99IP8W1ZFpgM9pYDV3VnufywtgDpKI/ohj2OybbsEIPrv9jib0jgaOh8rNu/fQVPpSILlU0yvtABjGBnie3AubYkxo+YLOmjc61BpJ5L3vqSbAqB3s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781583558; c=relaxed/simple; bh=CyIezXkQ/VhGdmEm4GlYfaMqz4teeTTJEP2eJp8jI2k=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=Z4umMEf43rBIuEMMH9ZHE2S2tm79UbuiosnV6HpHgkD2+CcNKL7IQMZmEpWgChb2aoS5TYpOWr0Oa3gQ7Wq/XsrEPm3JVuMd9FK3laf+BzlRzSdR3IEooSGsC2/wymbGi/8iFS2a1ixoEhgEfCZ5Nb7M7aSVbE6ORd8SgsxQX2E= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=hWSF0rQ/; arc=none smtp.client-ip=91.218.175.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="hWSF0rQ/" Message-ID: DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1781583544; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yrUSZAQ1rnGB4qjnMvjNJy2mIoSq6793b2K3Eamsp5E=; b=hWSF0rQ/T3L10AU2l/hxyOea5z+cyOCB+j5p6lpAT4d84ncCtwpON5zWRNiBFwfkURnYNm n2bQ03IvXGHwBZdH9EtQ7OQEhQ2lmnARGxq5XTrGusabA91gmnWtov3GEDEjVHk3MPcsq7 XweF8sos73u5Zt3VzJZp6KaL3CdmuVo= Date: Tue, 16 Jun 2026 12:18:54 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Subject: Re: [PATCH bpf-next v6 11/12] selftests/bpf: Add test to verify xlated insns for global percpu data Content-Language: en-US To: Alexei Starovoitov , bpf@vger.kernel.org Cc: Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Martin KaFai Lau , Eduard Zingerman , Kumar Kartikeya Dwivedi , Song Liu , Yonghong Song , Jiri Olsa , John Fastabend , Quentin Monnet , Shuah Khan , linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, kernel-patches-bot@fb.com References: <20260615152646.27639-1-leon.hwang@linux.dev> <20260615152646.27639-12-leon.hwang@linux.dev> X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Leon Hwang In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Migadu-Flow: FLOW_OUT On 16/6/26 05:29, Alexei Starovoitov wrote: > On Mon Jun 15, 2026 at 8:26 AM PDT, Leon Hwang wrote: [...] >> + ASSERT_EQ(ld_imm64_xlated[0].code, ld_imm64_raw[0].code, "ld_imm64 opcode"); >> + ASSERT_TRUE(ld_imm64_xlated[0].dst_reg == ld_imm64_raw[0].dst_reg, "ld_imm64 dst_reg"); >> + /* >> + * The xlated instruction has the map ID in imm and the offset >> + * in the next instruction's imm. The raw instruction just has >> + * the offset in its imm. >> + */ >> + ASSERT_EQ(ld_imm64_xlated[1].imm, ld_imm64_to_u64(ld_imm64_raw), "ld_imm64 off"); >> + >> + mov64_percpu_reg = BPF_MOV64_PERCPU_REG(ld_imm64_raw[0].dst_reg, ld_imm64_raw[0].dst_reg); >> + ASSERT_MEMEQ(&insns[idx + 2], &mov64_percpu_reg, insn_sz, "mov64_percpu_reg"); > > If the point of the test was to check that percpu_array_map_direct_value_meta() > computes 'off' correctly then it failed to achieve that goal. It was to check the 'off' and the mov64_percpu_reg insn. To avoid relying on the insns loaded from ELF obj, use raw insns to check the 'off' with a percpu_array map: struct bpf_insn raw_insns[] = { BPF_LD_MAP_VALUE(BPF_REG_1, 0, 0), BPF_LDX_MEM(BPF_W, BPF_REG_0, BPF_REG_1, 0), BPF_EXIT_INSN(), }; skel = test_global_percpu_data__open_and_load(); exp_off = offsetof(struct test_global_percpu_data__percpu, struct_data.nums[6]); raw_insns[0].imm = bpf_map__fd(skel->maps.percpu); raw_insns[1].imm = exp_off; prog_fd = bpf_prog_load(...); err = get_xlated_program(prog_fd, &insns, &cnt); idx = find_percpu_ld_imm64(insns, cnt); ASSERT_EQ(insns[idx + 1].imm, exp_off, "exp_off"); Would this achieve that goal? > It checks that map ID is correct which is a pointless test. > Either make it a real test or drop this patch. > No map ID check here. Thanks, Leon