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From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Shravan Ramani <shravankr@nvidia.com>
Cc: Hans de Goede <hdegoede@redhat.com>,
	Vadim Pasternak <vadimp@nvidia.com>,
	 David Thompson <davthompson@nvidia.com>,
	 "platform-driver-x86@vger.kernel.org"
	<platform-driver-x86@vger.kernel.org>,
	 LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 2/4] platform/mellanox: mlxbf-pmc: Add support for 64-bit counters and cycle count
Date: Fri, 14 Jun 2024 13:58:57 +0300 (EEST)	[thread overview]
Message-ID: <db45f242-7af9-5ae6-b72d-3354f1a33f70@linux.intel.com> (raw)
In-Reply-To: <DM4PR12MB5136181FEDCFFDD15C6AA1C2C0C22@DM4PR12MB5136.namprd12.prod.outlook.com>

On Fri, 14 Jun 2024, Shravan Ramani wrote:

> > This does nothing to answer my question. Where in the kernel, there's an
> > example where a 64-bit counter for BlueField platform is presented as 2
> > 32-bit counters? If there isn't any examples in the kernel, your statement
> > about consistency within the platform doesn't hold water, quoted (again)
> > here for clarity what I'm refering to:
> >
> > "The other interfaces follow this approach of having lower and upper
> > 32-bits separately in each counter, and the tools expect the same.
> > Hence the driver follows this approach to keep things consistent across
> > the BlueField platform."
> >
> > Where I can find those "other interfaces" that already follow this
> > convention?
> 
> Ah, I think I misunderstood the question and went on elaborating the
> same thing, apologies. The other interfaces are not part of the kernel.
> They are part of the BlueField Software Package, which also contains
> the tools that put together the performance metrics.
> My thinking was that since this is a platform driver and is used along
> with the BlueField Software Package, consistency with the tools which
> were developed following the same convention could be considered,
> as long as the driver is not doing something non-standard, of course.
> I can change the driver handling to present 64-bit data if you insist.

I'd certainly prefer 64-bit data be presented as such by the kernel.
While you make that change, please make sure the driver correctly handles 
the lower dword wraps without returning an inconsistent reading (assuming 
the counter parts are read non-atomically, it is a common pitfall).

-- 
 i.


  reply	other threads:[~2024-06-14 10:59 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-20 11:56 [PATCH v2 0/4] Updates to mlxbf-pmc Shravan Kumar Ramani
2024-05-20 11:56 ` [PATCH v2 1/4] Documentation/ABI: Add document for Mellanox PMC driver Shravan Kumar Ramani
2024-05-27 10:33   ` Ilpo Järvinen
2024-05-20 11:56 ` [PATCH v2 2/4] platform/mellanox: mlxbf-pmc: Add support for 64-bit counters and cycle count Shravan Kumar Ramani
2024-05-27 11:39   ` Ilpo Järvinen
2024-06-03 10:29     ` Shravan Ramani
2024-06-11  7:14       ` Ilpo Järvinen
2024-06-11 13:34         ` Shravan Ramani
2024-06-12  7:28           ` Ilpo Järvinen
2024-06-14 10:46             ` Shravan Ramani
2024-06-14 10:58               ` Ilpo Järvinen [this message]
2024-05-20 11:56 ` [PATCH v2 3/4] platform/mellanox: mlxbf-pmc: Add support for clock_measure performance block Shravan Kumar Ramani
2024-05-20 11:56 ` [PATCH v2 4/4] Documentation/ABI: Add new sysfs fields to sysfs-platform-mellanox-pmc Shravan Kumar Ramani

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