From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C200C433EF for ; Thu, 17 Feb 2022 16:44:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243398AbiBQQol (ORCPT ); Thu, 17 Feb 2022 11:44:41 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:60592 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242697AbiBQQog (ORCPT ); Thu, 17 Feb 2022 11:44:36 -0500 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA549AC; Thu, 17 Feb 2022 08:44:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1645116261; x=1676652261; h=message-id:date:mime-version:to:cc:references:from: subject:in-reply-to:content-transfer-encoding; bh=XqrJSESx4co6rylkuJdM9NA+JNlPqfIB9lAf1Ua1BBA=; b=IG1/OdJJG4CmrkH8uJ+hXfvapFyTqIXRmcbr1EbRLcqrzbGd+hj/phJk 2zddSoTlBaD8EiPuiilzq1XKShZjA4BQSEHZZ5vREOsNSObXiNndzEKxq Efsu1vy23Zr4Ph2EEfabKjkgUtiGK7uB7HTR+GAUVebcEvFSaK4+fNPUU vgm/EbgjJVHa5YxUYf3Mx8ZeqmlW32mH5TikpaqPVq7xuTWLsxzGiXdRZ pZqs2Gs89wJaqcMps35jB6tPjY02/RuV7xF9ZQpkKYtA2um3e/pt0u6FF jLjjKK5IL0EKfb/6H0oqePU+GUKniLzh+nLYdU5uL9DZKh5aYVM3xqOR5 A==; X-IronPort-AV: E=McAfee;i="6200,9189,10261"; a="314181323" X-IronPort-AV: E=Sophos;i="5.88,376,1635231600"; d="scan'208";a="314181323" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Feb 2022 08:44:21 -0800 X-IronPort-AV: E=Sophos;i="5.88,376,1635231600"; d="scan'208";a="530351502" Received: from drichard-mobl2.amr.corp.intel.com (HELO [10.209.21.238]) ([10.209.21.238]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Feb 2022 08:44:21 -0800 Message-ID: Date: Thu, 17 Feb 2022 08:44:17 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Content-Language: en-US To: Brian Geffon Cc: Greg KH , Thomas Gleixner , Willis Kung , Guenter Roeck , Borislav Petkov , Andy Lutomirski , "# v4 . 10+" , the arch/x86 maintainers , LKML References: <543efc25-9b99-53cd-e305-d8b4d917b64b@intel.com> <20220215192233.8717-1-bgeffon@google.com> From: Dave Hansen Subject: Re: [PATCH stable 5.4,5.10] x86/fpu: Correct pkru/xstate inconsistency In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/17/22 05:31, Brian Geffon wrote: > How would you and Greg KH like to proceed with this? I'm happy to help > however I can. If I could wave a magic wand, I'd just apply the whole FPU rewrite to stable. My second choice would be to stop managing PKRU with XSAVE. x86_pkru_load() uses WRPKRU instead of XSAVE and keeps the task's PKRU in task->pkru instead of the XSAVE buffer. Doing that will take some care, including pulling XFEATURE_PKRU out of the feature mask (RFBM) at XRSTOR. I _think_ that can be done in a manageable set of patches which will keep stable close to mainline. I recognize that more bugs might get introduced in the process which are unique to stable. If you give that a shot and realize that it's not feasible to do a subset, then we can fall back to the minimal fix. I'm not asking for a multi-month engineering effort here. Maybe an hour or two to see if it's really as scary as it looks.