Re: [PATCH 1/1] iommu/vt-d: Unconditionally flush device TLB for pasid table updates

[Yi Liu <yi.l.liu@intel.com>]

On 2024/8/20 15:37, Baolu Lu wrote:
> On 2024/8/20 15:09, Yi Liu wrote:
>> On 2024/8/20 11:02, Lu Baolu wrote:
>>> The caching mode of an IOMMU is irrelevant to the behavior of the device
>>> TLB. Previously, commit <304b3bde24b5> ("iommu/vt-d: Remove caching mode
>>> check before device TLB flush") removed this redundant check in the
>>> domain unmap path.
>>>
>>> Checking the caching mode before flushing the device TLB after a pasid
>>> table entry is updated is unnecessary and can lead to inconsistent
>>> behavior.
>>>
>>> Extends this consistency by removing the caching mode check in the pasid
>>> table update path.
>>
>> I'm wondering if a fix tag is needed here. Before this patch, the guest
>> kernel does not issue device TLB invalidation. This may be a problem for
>> the emulated devices that support ATS capability. The cache in device
>> side would be stale. Although some vIOMMU like QEMU virtual VT-d would
>> notify the emulated devices to flush their cache when handling the unmap
>> event. [1]. But this is not required by VT-d spec. So it's possible that
>> other vIOMMU may not do it. So this patch appears to fix an issue, so a fix
>> tag may be necessary. How about your thought?
> 
> It depends on whether this solves any real or potential issues.

What about the rule for it? A real issue should already been reported or
identified to happen even no one complained yet due to no related tests. :)

-- 
Regards,
Yi Liu