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Tue, 18 Nov 2025 09:56:46 -0800 (PST) X-Google-Smtp-Source: AGHT+IHQlMErgROQXlsJJoTVKsYRv9QN0O/2YGJMmSrS6nuYJu/7XEVDBts4CiDzoWr4bcLhtAddlA== X-Received: by 2002:a17:903:388d:b0:298:8a9:766a with SMTP id d9443c01a7336-2986a76744amr178497255ad.53.1763488606089; Tue, 18 Nov 2025 09:56:46 -0800 (PST) Received: from [192.168.1.13] ([106.222.233.13]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2985c2346b8sm181565255ad.16.2025.11.18.09.56.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 18 Nov 2025 09:56:45 -0800 (PST) Message-ID: Date: Tue, 18 Nov 2025 23:26:37 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 15/22] drm/msm/adreno: Support AQE engine To: Connor Abbott Cc: Rob Clark , Bjorn Andersson , Konrad Dybcio , Sean Paul , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , Jonathan Marek , Jordan Crouse , Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org References: <20251118-kaana-gpu-support-v4-0-86eeb8e93fb6@oss.qualcomm.com> <20251118-kaana-gpu-support-v4-15-86eeb8e93fb6@oss.qualcomm.com> Content-Language: en-US From: Akhil P Oommen In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=a6Q9NESF c=1 sm=1 tr=0 ts=691cb35f cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=/VsID1VB8JbHTH3F2fYZMQ==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=neJfBgYAGg7YAZYFY1IA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-GUID: f_OmS49yXquYGRzar5DuawQ0GihhBpty X-Proofpoint-ORIG-GUID: f_OmS49yXquYGRzar5DuawQ0GihhBpty X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTE4MDE0NSBTYWx0ZWRfX5qMcQD6yuEvK 5MC8NCH53zrBbtJ4WGCGG6Zp9flItVTnkcFdc6DWd8zS1DXbAxtpR3y+vBgFgEfVjxPswS2P7DB SO/pVqFSVegricMw5xCw2QyyNDuLy3uwvb3yf2sFfckZXg7I4gEyBGzL9c8DtkchgjXFvDsCY+I j0Vh9OjI3ifkAkN4IVqTHDjF0Sf7J07vAxwIotqgzUP+qlIRcim0qFLVvFztt9/vG+fxXXrPFW1 CA1Mq1GWFpkBh57evUeB8QktZ5jgSMfVLwa43RoKbM7YVL6YNeJ8Cw6ls4S9SNxBKO/DGF1xws7 Po3CMVwXd4OrW+urNgnRBQEyf2hN9hrHq6bCkqplyAdwQlyTHFEaIpx+RWvQXnb3003TlwvyhZ/ sTU2bysaB6jr4pMnmlmXhdtwHpzEBA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-18_02,2025-11-18_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 adultscore=0 clxscore=1015 phishscore=0 lowpriorityscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511180145 On 11/18/2025 9:26 PM, Connor Abbott wrote: > On Tue, Nov 18, 2025 at 3:53 AM Akhil P Oommen wrote: >> >> AQE (Applicaton Qrisc Engine) is a dedicated core inside CP which aides >> in Raytracing related workloads. Add support for loading the AQE firmware >> and initialize the necessary registers. >> >> Since AQE engine has dependency on preemption context records, expose >> Raytracing support to userspace only when preemption is enabled. > > I guess the plan is to expose MSM_PARAM_AQE later once preemption > records are in place and for now just load the firmware to ensure that > people have it? > > The interrupt error handling is still missing, but I guess that can be > handled later if that's the plan. Correct. The stale 2nd para in the commit text will be removed when Rob apply the patches. -Akhil > > Connor > >> >> Signed-off-by: Akhil P Oommen >> --- >> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 22 ++++++++++++++++++++++ >> drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 2 ++ >> drivers/gpu/drm/msm/adreno/a8xx_gpu.c | 3 +++ >> drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 + >> 4 files changed, 28 insertions(+) >> >> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >> index 810b64b909f5..9a643bcccdcf 100644 >> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >> @@ -1118,6 +1118,23 @@ static int a6xx_ucode_load(struct msm_gpu *gpu) >> } >> } >> >> + if (!a6xx_gpu->aqe_bo && adreno_gpu->fw[ADRENO_FW_AQE]) { >> + a6xx_gpu->aqe_bo = adreno_fw_create_bo(gpu, >> + adreno_gpu->fw[ADRENO_FW_AQE], &a6xx_gpu->aqe_iova); >> + >> + if (IS_ERR(a6xx_gpu->aqe_bo)) { >> + int ret = PTR_ERR(a6xx_gpu->aqe_bo); >> + >> + a6xx_gpu->aqe_bo = NULL; >> + DRM_DEV_ERROR(&gpu->pdev->dev, >> + "Could not allocate AQE ucode: %d\n", ret); >> + >> + return ret; >> + } >> + >> + msm_gem_object_set_name(a6xx_gpu->aqe_bo, "aqefw"); >> + } >> + >> /* >> * Expanded APRIV and targets that support WHERE_AM_I both need a >> * privileged buffer to store the RPTR shadow >> @@ -2400,6 +2417,11 @@ static void a6xx_destroy(struct msm_gpu *gpu) >> drm_gem_object_put(a6xx_gpu->sqe_bo); >> } >> >> + if (a6xx_gpu->aqe_bo) { >> + msm_gem_unpin_iova(a6xx_gpu->aqe_bo, gpu->vm); >> + drm_gem_object_put(a6xx_gpu->aqe_bo); >> + } >> + >> if (a6xx_gpu->shadow_bo) { >> msm_gem_unpin_iova(a6xx_gpu->shadow_bo, gpu->vm); >> drm_gem_object_put(a6xx_gpu->shadow_bo); >> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h >> index e6218b0b9732..3a054fcdeb4a 100644 >> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h >> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h >> @@ -59,6 +59,8 @@ struct a6xx_gpu { >> >> struct drm_gem_object *sqe_bo; >> uint64_t sqe_iova; >> + struct drm_gem_object *aqe_bo; >> + uint64_t aqe_iova; >> >> struct msm_ringbuffer *cur_ring; >> struct msm_ringbuffer *next_ring; >> diff --git a/drivers/gpu/drm/msm/adreno/a8xx_gpu.c b/drivers/gpu/drm/msm/adreno/a8xx_gpu.c >> index c9cd7546024a..e011e80ceb50 100644 >> --- a/drivers/gpu/drm/msm/adreno/a8xx_gpu.c >> +++ b/drivers/gpu/drm/msm/adreno/a8xx_gpu.c >> @@ -627,6 +627,9 @@ static int hw_init(struct msm_gpu *gpu) >> goto out; >> >> gpu_write64(gpu, REG_A8XX_CP_SQE_INSTR_BASE, a6xx_gpu->sqe_iova); >> + if (a6xx_gpu->aqe_iova) >> + gpu_write64(gpu, REG_A8XX_CP_AQE_INSTR_BASE_0, a6xx_gpu->aqe_iova); >> + >> /* Set the ringbuffer address */ >> gpu_write64(gpu, REG_A6XX_CP_RB_BASE, gpu->rb[0]->iova); >> gpu_write(gpu, REG_A6XX_CP_RB_CNTL, MSM_GPU_RB_CNTL_DEFAULT); >> diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h >> index c496b63ffd41..0aca222c46bc 100644 >> --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h >> +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h >> @@ -27,6 +27,7 @@ enum { >> ADRENO_FW_PFP = 1, >> ADRENO_FW_GMU = 1, /* a6xx */ >> ADRENO_FW_GPMU = 2, >> + ADRENO_FW_AQE = 3, >> ADRENO_FW_MAX, >> }; >> >> >> -- >> 2.51.0 >>