From: Ravi Bangoria <ravi.bangoria@amd.com>
To: Robert Richter <rrichter@amd.com>
Cc: peterz@infradead.org, acme@kernel.org, mingo@redhat.com,
mark.rutland@arm.com, jolsa@kernel.org, namhyung@kernel.org,
tglx@linutronix.de, bp@alien8.de, irogers@google.com,
yao.jin@linux.intel.com, james.clark@arm.com, leo.yan@linaro.org,
kan.liang@linux.intel.com, ak@linux.intel.com,
eranian@google.com, like.xu.linux@gmail.com, x86@kernel.org,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
sandipan.das@amd.com, ananth.narayan@amd.com,
kim.phillips@amd.com, santosh.shukla@amd.com,
Ravi Bangoria <ravi.bangoria@amd.com>
Subject: Re: [PATCH 3/6] perf/tool/amd/ibs: Warn about sampling period skew
Date: Tue, 26 Apr 2022 17:13:21 +0530 [thread overview]
Message-ID: <debc3ad7-221e-c615-435e-0ddced9c6276@amd.com> (raw)
In-Reply-To: <YmfE6wIA1Dbet1nX@rric.localdomain>
On 26-Apr-22 3:39 PM, Robert Richter wrote:
> On 25.04.22 10:13:20, Ravi Bangoria wrote:
>
>> @@ -29,3 +31,32 @@ void arch_evsel__fixup_new_cycles(struct perf_event_attr *attr)
>>
>> free(env.cpuid);
>> }
>> +
>> +void arch_evsel__warn_ambiguity(struct evsel *evsel, struct perf_event_attr *attr)
>
> Have an 'ibs_' string in the name?
No, this is not ibs specific. Any arch can define it's own version.
>
>> +{
>> + struct perf_env *env = evsel__env(evsel);
>> + struct perf_pmu *evsel_pmu = evsel__find_pmu(evsel);
>> + struct perf_pmu *ibs_fetch_pmu = perf_pmu__find("ibs_fetch");
>> + struct perf_pmu *ibs_op_pmu = perf_pmu__find("ibs_op");
>> + static int warned_once;
>> +
>> + if (warned_once || !perf_env__cpuid(env) || !env->cpuid ||
>> + !strstarts(env->cpuid, "AuthenticAMD") || !evsel_pmu)
>> + return;
>> +
>> + if (ibs_fetch_pmu && ibs_fetch_pmu->type == evsel_pmu->type) {
>> + if (attr->config & (1ULL << 59)) {
>> + pr_warning(
>> +"WARNING: Hw internally resets sampling period when L3 Miss Filtering is enabled\n"
>> +"and tagged operation does not cause L3 Miss. This causes sampling period skew.\n");
>> + warned_once = 1;
>> + }
>> + } else if (ibs_op_pmu && ibs_op_pmu->type == evsel_pmu->type) {
>> + if (attr->config & (1ULL << 16)) {
>> + pr_warning(
>> +"WARNING: Hw internally resets sampling period when L3 Miss Filtering is enabled\n"
>> +"and tagged operation does not cause L3 Miss. This causes sampling period skew.\n");
>
> Avoid duplicate code. You could move it to the end of the function and
> early return if the config bit is not set.
Sure.
Thanks,
Ravi
next prev parent reply other threads:[~2022-04-26 11:43 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-25 4:43 [PATCH 0/6] perf/amd: Zen4 IBS extensions support Ravi Bangoria
2022-04-25 4:43 ` [PATCH 1/6] perf/amd/ibs: Add support for L3 miss filtering Ravi Bangoria
2022-04-26 9:18 ` Robert Richter
2022-04-26 11:25 ` Ravi Bangoria
2022-04-26 10:07 ` Peter Zijlstra
2022-04-26 11:30 ` Ravi Bangoria
2022-04-25 4:43 ` [PATCH 2/6] perf/amd/ibs: Advertise zen4_ibs_extensions as pmu capability attribute Ravi Bangoria
2022-04-26 9:57 ` Robert Richter
2022-04-26 11:40 ` Ravi Bangoria
2022-04-25 4:43 ` [PATCH 3/6] perf/tool/amd/ibs: Warn about sampling period skew Ravi Bangoria
2022-04-26 10:09 ` Robert Richter
2022-04-26 11:43 ` Ravi Bangoria [this message]
2022-04-25 4:43 ` [PATCH 4/6] perf/tool: Parse non-cpu pmu capabilities Ravi Bangoria
2022-04-26 10:37 ` Robert Richter
2022-04-26 11:53 ` Ravi Bangoria
2022-04-25 4:43 ` [PATCH 5/6] perf/tool/amd/ibs: Support new IBS bits in raw trace dump Ravi Bangoria
2022-04-26 11:27 ` Robert Richter
2022-04-26 13:34 ` Ravi Bangoria
2022-04-25 4:43 ` [PATCH 6/6] perf/tool/amd/ibs: Fix comment Ravi Bangoria
2022-04-26 11:27 ` Robert Richter
2022-04-25 20:32 ` [PATCH 0/6] perf/amd: Zen4 IBS extensions support Peter Zijlstra
2022-04-26 7:00 ` Ravi Bangoria
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