[PATCH v3 4/9] perf/x86/lbr: Use GFP_ATOMIC for cpuc->lbr_xsave memory allocation

Like Xu
2021-03-03T18:11:47Z

When allocating the cpuc->lbr_xsave memory in the guest Arch LBR driver,
we may get a stacktrace due to relatively slow execution like below:

[ 54.283563] BUG: sleeping function called from invalid context at include/linux/sched/mm.h:196
[ 54.285218] in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 830, name: perf
[ 54.286684] INFO: lockdep is turned off.
[ 54.287448] irq event stamp: 8644
[ 54.288098] hardirqs last enabled at (8643): [<ffffffff810e2212>] __local_bh_enable_ip+0x82/0xd0
[ 54.289806] hardirqs last disabled at (8644): [<ffffffff812a8777>] perf_event_exec+0x1c7/0x3c0
[ 54.291418] softirqs last enabled at (8642): [<ffffffff81033f22>] fpu__clear+0x92/0x190
[ 54.292921] softirqs last disabled at (8638): [<ffffffff81033e95>] fpu__clear+0x5/0x190
[ 54.294418] CPU: 3 PID: 830 Comm: perf Not tainted 5.11.0-guest+ #1145
[ 54.295635] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 0.0.0 02/06/2015
[ 54.297136] Call Trace:
[ 54.297603] dump_stack+0x8b/0xb0
[ 54.298246] ___might_sleep.cold+0xb6/0xc6
[ 54.299022] ? intel_pmu_lbr_add+0x147/0x160
[ 54.299823] kmem_cache_alloc+0x26d/0x2f0
[ 54.300587] intel_pmu_lbr_add+0x147/0x160
[ 54.301358] x86_pmu_add+0x85/0xe0
[ 54.302009] ? check_irq_usage+0x147/0x460
[ 54.302793] ? __bfs+0x210/0x210
[ 54.303420] ? stack_trace_save+0x3b/0x50
[ 54.304190] ? check_noncircular+0x66/0xf0
[ 54.304978] ? save_trace+0x3f/0x2f0
[ 54.305670] event_sched_in+0xf5/0x2a0
[ 54.306401] merge_sched_in+0x1a0/0x3b0
[ 54.307141] visit_groups_merge.constprop.0.isra.0+0x16e/0x490
[ 54.308255] ctx_sched_in+0xcc/0x200
[ 54.308948] ctx_resched+0x84/0xe0
[ 54.309606] perf_event_exec+0x2c0/0x3c0
[ 54.310370] begin_new_exec+0x627/0xbc0
[ 54.311096] load_elf_binary+0x734/0x17a0
[ 54.311853] ? lock_acquire+0xbc/0x360
[ 54.312562] ? bprm_execve+0x346/0x860
[ 54.313272] ? kvm_sched_clock_read+0x14/0x30
[ 54.314095] ? sched_clock+0x5/0x10
[ 54.314760] ? sched_clock_cpu+0xc/0xb0
[ 54.315492] bprm_execve+0x337/0x860
[ 54.316176] do_execveat_common+0x164/0x1d0
[ 54.316971] __x64_sys_execve+0x39/0x50
[ 54.317698] do_syscall_64+0x33/0x40
[ 54.318390] entry_SYSCALL_64_after_hwframe+0x44/0xa9

Fix it by allocating this part of memory with GFP_ATOMIC mask.

Cc: Peter Zijlstra <peterz@infradead.org>
Fixes: c085fb8774 ("perf/x86/intel/lbr: Support XSAVES for arch LBR read")
Suggested-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Like Xu <like.xu@linux.intel.com>
---
arch/x86/events/intel/lbr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c
index 355ea70f1879..495466b12480 100644
--- a/arch/x86/events/intel/lbr.c
+++ b/arch/x86/events/intel/lbr.c
@@ -700,7 +700,7 @@ void intel_pmu_lbr_add(struct perf_event *event)
if (static_cpu_has(X86_FEATURE_ARCH_LBR) &&
kmem_cache && !cpuc->lbr_xsave &&
(cpuc->lbr_users != cpuc->lbr_pebs_users))
- cpuc->lbr_xsave = kmem_cache_alloc(kmem_cache, GFP_KERNEL);
+ cpuc->lbr_xsave = kmem_cache_alloc(kmem_cache, GFP_ATOMIC);
}

void release_lbr_buffers(void)
--
2.29.2