Re: [PATCH v1] PCI: Wait for device readiness after D3hot -> D0uninitialized transition

[Mario Limonciello <superm1@kernel.org>]

On 5/14/26 10:31, Bjorn Helgaas wrote:
> For a device that advertises No_Soft_Reset == 0, a transition from D3hot to
> D0uninitialized is a soft reset, and the resulting internal device state is
> undefined.
> 
> A transition from D3hot to D0uninitialized requires a minimum delay of
> 10 msec before accessing the device, but after that delay, the device is
> permitted to respond to config requests with RRS completion status if it
> needs more time to initialize (PCIe r7.0, sec 2.3.1).
> 
> Call pci_dev_wait() after pci_power_up() performs a D3hot->D0uninitialized
> transition to ensure the device is ready to accept config accesses, as is
> done after the similar transition in pci_pm_reset().
> 
> If the device is already ready, this is essentially a no-op except for one
> additional config read.
> 
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org>

BTW -

This reminds me of an attempt I had at solving a similar issue a few 
years back.  It would be a nice side effect if this actually solves that 
  issue too.

https://lore.kernel.org/linux-pci/20240823154023.360234-3-superm1@kernel.org/

> ---
>   drivers/pci/pci.c | 18 ++++++++++++++++--
>   1 file changed, 16 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 8f7cfcc00090..9d0fc9fbb76a 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -1301,6 +1301,16 @@ int pci_power_up(struct pci_dev *dev)
>   	pci_power_t state;
>   	u16 pmcsr;
>   
> +	/*
> +	 * When setting power state to D0, platform_pci_set_power_state()
> +	 * ensures main power is on.  If it puts the device in D0, it also
> +	 * completes any required delays after the transition; if it leaves
> +	 * the device in D1, D2, or D3hot, we use the PM Capability to
> +	 * transition to D0.
> +	 *
> +	 * In all cases, the device is either Configuration-Ready or
> +	 * inaccessible upon return.
> +	 */
>   	platform_pci_set_power_state(dev, PCI_D0);
>   
>   	if (!dev->pm_cap) {
> @@ -1341,10 +1351,14 @@ int pci_power_up(struct pci_dev *dev)
>   	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, 0);
>   
>   	/* Mandatory transition delays; see PCI PM 1.2. */
> -	if (state == PCI_D3hot)
> +	if (state == PCI_D3hot) {
>   		pci_dev_d3_sleep(dev);
> -	else if (state == PCI_D2)
> +		if (!(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET))
> +			pci_dev_wait(dev, "power up D3hot->D0uninitialized",
> +				     PCIE_RESET_READY_POLL_MS);
> +	} else if (state == PCI_D2) {
>   		udelay(PCI_PM_D2_DELAY);
> +	}
>   
>   end:
>   	dev->current_state = PCI_D0;