* [PATCH] arm64: dts: altera: socfpga_stratix10: update internal oscillators
@ 2025-06-25 15:14 Matthew Gerlach
2025-06-26 12:03 ` Dinh Nguyen
0 siblings, 1 reply; 2+ messages in thread
From: Matthew Gerlach @ 2025-06-25 15:14 UTC (permalink / raw)
To: dinguyen, robh, krzk+dt, conor+dt, devicetree, linux-kernel
Cc: Matthew Gerlach
Add the clock-frequency property to the cb_intosc_ls_clk and
cb_intosc_hs_div2_clk device tree nodes.
The f2s_free_clk is implemented by custom logic in the FPGA; so it
should be disabled in the dtsi by default and enabled by a
dts for a specific FPGA design on a specific board.
Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com>
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 0def0b0daaf7..ad611f9e431a 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -130,16 +130,19 @@ clocks {
cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
+ clock-frequency = <150000000>;
};
cb_intosc_ls_clk: cb-intosc-ls-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
+ clock-frequency = <300000000>;
};
f2s_free_clk: f2s-free-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
+ status = "disabled";
};
osc1: osc1 {
--
2.35.3
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] arm64: dts: altera: socfpga_stratix10: update internal oscillators
2025-06-25 15:14 [PATCH] arm64: dts: altera: socfpga_stratix10: update internal oscillators Matthew Gerlach
@ 2025-06-26 12:03 ` Dinh Nguyen
0 siblings, 0 replies; 2+ messages in thread
From: Dinh Nguyen @ 2025-06-26 12:03 UTC (permalink / raw)
To: Matthew Gerlach, robh, krzk+dt, conor+dt, devicetree,
linux-kernel
On 6/25/25 10:14, Matthew Gerlach wrote:
> Add the clock-frequency property to the cb_intosc_ls_clk and
> cb_intosc_hs_div2_clk device tree nodes.
>
> The f2s_free_clk is implemented by custom logic in the FPGA; so it
> should be disabled in the dtsi by default and enabled by a
> dts for a specific FPGA design on a specific board.
>
> Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com>
> ---
> arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
Applied!
Dinh
^ permalink raw reply [flat|nested] 2+ messages in thread
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2025-06-25 15:14 [PATCH] arm64: dts: altera: socfpga_stratix10: update internal oscillators Matthew Gerlach
2025-06-26 12:03 ` Dinh Nguyen
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