From: <Durai.ManickamKR@microchip.com>
To: <Claudiu.Beznea@microchip.com>, <Nicolas.Ferre@microchip.com>,
<Cristian.Birsan@microchip.com>, <Hari.PrasathGE@microchip.com>,
<davem@davemloft.net>, <krzysztof.kozlowski+dt@linaro.org>,
<alexandre.belloni@bootlin.com>, <arnd@arndb.de>,
<olof@lixom.net>, <soc@kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <Manikandan.M@microchip.com>,
<Kavyasree.Kotagiri@microchip.com>,
<Horatiu.Vultur@microchip.com>
Subject: Re: [PATCHv1 6/8] ARM: dts: at91: sam9x60: Add missing flexcom definitions
Date: Tue, 15 Nov 2022 05:40:26 +0000 [thread overview]
Message-ID: <e0ca517d-30d7-db19-4a67-073ae4411a2f@microchip.com> (raw)
In-Reply-To: <ae06bb6a-d7d9-36d7-4fb6-b5597405039e@microchip.com>
On 31/10/22 15:58, Claudiu Beznea - M18063 wrote:
> On 31.10.2022 05:36, Durai Manickam KR wrote:
>> Added the missing flexcom functions for all the flexcom nodes.
>>
>> Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
>> Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
>> Signed-off-by: Manikandan M <manikandan.m@microchip.com>
>> ---
>> arch/arm/boot/dts/sam9x60.dtsi | 547 +++++++++++++++++++++++++++++++++
>> 1 file changed, 547 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi
>> index 74599d21ebcc..4902a2e5fc21 100644
>> --- a/arch/arm/boot/dts/sam9x60.dtsi
>> +++ b/arch/arm/boot/dts/sam9x60.dtsi
>> @@ -171,6 +171,27 @@ flx4: flexcom@f0000000 {
>> ranges = <0x0 0xf0000000 0x800>;
>> status = "disabled";
>>
>> + uart4: serial@200 {
>> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
>> + reg = <0x200 0x200>;
>> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(8))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(9))>;
>> + dma-names = "tx", "rx";
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
>> + clock-names = "usart";
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> spi4: spi@400 {
>> compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
>> reg = <0x400 0x200>;
>> @@ -189,6 +210,24 @@ AT91_XDMAC_DT_PER_IF(1) |
>> atmel,fifo-size = <16>;
>> status = "disabled";
>> };
>> +
>> + i2c4: i2c@600 {
>> + compatible = "microchip,sam9x60-i2c";
>> + reg = <0x600 0x200>;
>> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(8))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(9))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> };
>>
>> flx5: flexcom@f0004000 {
>> @@ -220,6 +259,43 @@ AT91_XDMAC_DT_PER_IF(1) |
>> atmel,fifo-size = <16>;
>> status = "disabled";
>> };
>> +
>> + spi5: spi@400 {
>> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
>> + reg = <0x400 0x200>;
>> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
>> + clock-names = "spi_clk";
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(10))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(11))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> + i2c5: i2c@600 {
>> + compatible = "microchip,sam9x60-i2c";
>> + reg = <0x600 0x200>;
>> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(10))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(11))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> };
>>
>> dma0: dma-controller@f0008000 {
>> @@ -302,6 +378,45 @@ flx11: flexcom@f0020000 {
>> #size-cells = <1>;
>> ranges = <0x0 0xf0020000 0x800>;
>> status = "disabled";
>> +
>> + uart11: serial@200 {
>> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
>> + reg = <0x200 0x200>;
>> + interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(22))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(23))>;
>> + dma-names = "tx", "rx";
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
>> + clock-names = "usart";
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> + i2c11: i2c@600 {
>> + compatible = "microchip,sam9x60-i2c";
>> + reg = <0x600 0x200>;
>> + interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(22))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(23))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> };
>>
>> flx12: flexcom@f0024000 {
>> @@ -312,6 +427,45 @@ flx12: flexcom@f0024000 {
>> #size-cells = <1>;
>> ranges = <0x0 0xf0024000 0x800>;
>> status = "disabled";
>> +
>> + uart12: serial@200 {
>> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
>> + reg = <0x200 0x200>;
>> + interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(24))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(25))>;
>> + dma-names = "tx", "rx";
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
>> + clock-names = "usart";
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> + i2c12: i2c@600 {
>> + compatible = "microchip,sam9x60-i2c";
>> + reg = <0x600 0x200>;
>> + interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(24))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(25))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> };
>>
>> pit64b: timer@f0028000 {
>> @@ -431,6 +585,27 @@ flx6: flexcom@f8010000 {
>> ranges = <0x0 0xf8010000 0x800>;
>> status = "disabled";
>>
>> + uart6: serial@200 {
>> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
>> + reg = <0x200 0x200>;
>> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(12))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(13))>;
>> + dma-names = "tx", "rx";
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
>> + clock-names = "usart";
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> i2c6: i2c@600 {
>> compatible = "microchip,sam9x60-i2c";
>> reg = <0x600 0x200>;
>> @@ -458,6 +633,45 @@ flx7: flexcom@f8014000 {
>> #size-cells = <1>;
>> ranges = <0x0 0xf8014000 0x800>;
>> status = "disabled";
>> +
>> + uart7: serial@200 {
>> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
>> + reg = <0x200 0x200>;
>> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(14))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(15))>;
>> + dma-names = "tx", "rx";
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
>> + clock-names = "usart";
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> + i2c7: i2c@600 {
>> + compatible = "microchip,sam9x60-i2c";
>> + reg = <0x600 0x200>;
>> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(14))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(15))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> };
>>
>> flx8: flexcom@f8018000 {
>> @@ -468,15 +682,96 @@ flx8: flexcom@f8018000 {
>> #size-cells = <1>;
>> ranges = <0x0 0xf8018000 0x800>;
>> status = "disabled";
>> +
>> + uart8: serial@200 {
>> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
>> + reg = <0x200 0x200>;
>> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(16))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(17))>;
>> + dma-names = "tx", "rx";
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
>> + clock-names = "usart";
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> + i2c8: i2c@600 {
>> + compatible = "microchip,sam9x60-i2c";
>> + reg = <0x600 0x200>;
>> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(16))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(17))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> };
>>
>> flx0: flexcom@f801c000 {
>> compatible = "atmel,sama5d2-flexcom";
>> reg = <0xf801c000 0x200>;
>> clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
> This should go in a different patch.
>
> Appart from that some flexcom nodes don't have all the subnodes added but
> only a part of them. Is this by intention?
Hi Claudiu,
Some of the flexcom nodes does not have all the controller like UART,
I2C and SPI. So referring the datasheet we have added all the available
nodes for the flexcom.
>
>> ranges = <0x0 0xf801c000 0x800>;
>> status = "disabled";
>>
>> + uart0: serial@200 {
>> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
>> + reg = <0x200 0x200>;
>> + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(0))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(1))>;
>> + dma-names = "tx", "rx";
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
>> + clock-names = "usart";
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> + spi0: spi@400 {
>> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
>> + reg = <0x400 0x200>;
>> + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
>> + clock-names = "spi_clk";
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(0))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(1))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> i2c0: i2c@600 {
>> compatible = "microchip,sam9x60-i2c";
>> reg = <0x600 0x200>;
>> @@ -506,6 +801,64 @@ flx1: flexcom@f8020000 {
>> #size-cells = <1>;
>> ranges = <0x0 0xf8020000 0x800>;
>> status = "disabled";
>> +
>> + uart1: serial@200 {
>> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
>> + reg = <0x200 0x200>;
>> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(2))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(3))>;
>> + dma-names = "tx", "rx";
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
>> + clock-names = "usart";
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> + spi1: spi@400 {
>> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
>> + reg = <0x400 0x200>;
>> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
>> + clock-names = "spi_clk";
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(2))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(3))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> + i2c1: i2c@600 {
>> + compatible = "microchip,sam9x60-i2c";
>> + reg = <0x600 0x200>;
>> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(2))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(3))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> };
>>
>> flx2: flexcom@f8024000 {
>> @@ -516,6 +869,64 @@ flx2: flexcom@f8024000 {
>> #size-cells = <1>;
>> ranges = <0x0 0xf8024000 0x800>;
>> status = "disabled";
>> +
>> + uart2: serial@200 {
>> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
>> + reg = <0x200 0x200>;
>> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(4))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(5))>;
>> + dma-names = "tx", "rx";
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
>> + clock-names = "usart";
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> + spi2: spi@400 {
>> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
>> + reg = <0x400 0x200>;
>> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
>> + clock-names = "spi_clk";
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(4))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(5))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> + i2c2: i2c@600 {
>> + compatible = "microchip,sam9x60-i2c";
>> + reg = <0x600 0x200>;
>> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(4))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(5))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> };
>>
>> flx3: flexcom@f8028000 {
>> @@ -526,6 +937,64 @@ flx3: flexcom@f8028000 {
>> #size-cells = <1>;
>> ranges = <0x0 0xf8028000 0x800>;
>> status = "disabled";
>> +
>> + uart3: serial@200 {
>> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
>> + reg = <0x200 0x200>;
>> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(6))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(7))>;
>> + dma-names = "tx", "rx";
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
>> + clock-names = "usart";
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> + spi3: spi@400 {
>> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
>> + reg = <0x400 0x200>;
>> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
>> + clock-names = "spi_clk";
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(6))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(7))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> + i2c3: i2c@600 {
>> + compatible = "microchip,sam9x60-i2c";
>> + reg = <0x600 0x200>;
>> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(6))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(7))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> };
>>
>> macb0: ethernet@f802c000 {
>> @@ -591,6 +1060,45 @@ flx9: flexcom@f8040000 {
>> #size-cells = <1>;
>> ranges = <0x0 0xf8040000 0x800>;
>> status = "disabled";
>> +
>> + uart9: serial@200 {
>> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
>> + reg = <0x200 0x200>;
>> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(18))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(19))>;
>> + dma-names = "tx", "rx";
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
>> + clock-names = "usart";
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> + i2c9: i2c@600 {
>> + compatible = "microchip,sam9x60-i2c";
>> + reg = <0x600 0x200>;
>> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(18))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(19))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> };
>>
>> flx10: flexcom@f8044000 {
>> @@ -601,6 +1109,45 @@ flx10: flexcom@f8044000 {
>> #size-cells = <1>;
>> ranges = <0x0 0xf8044000 0x800>;
>> status = "disabled";
>> +
>> + uart10: serial@200 {
>> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
>> + reg = <0x200 0x200>;
>> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(20))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(21))>;
>> + dma-names = "tx", "rx";
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
>> + clock-names = "usart";
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> +
>> + i2c10: i2c@600 {
>> + compatible = "microchip,sam9x60-i2c";
>> + reg = <0x600 0x200>;
>> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
>> + dmas = <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(20))>,
>> + <&dma0
>> + (AT91_XDMAC_DT_MEM_IF(0) |
>> + AT91_XDMAC_DT_PER_IF(1) |
>> + AT91_XDMAC_DT_PERID(21))>;
>> + dma-names = "tx", "rx";
>> + atmel,fifo-size = <16>;
>> + status = "disabled";
>> + };
>> };
>>
>> isi: isi@f8048000 {
next prev parent reply other threads:[~2022-11-15 5:40 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20221031033653.43269-1-durai.manickamkr@microchip.com>
2022-10-31 10:20 ` [PATCHv1 0/8] Add support for sam9x60 curiosity board Claudiu.Beznea
2022-11-02 20:18 ` Krzysztof Kozlowski
2022-11-03 5:12 ` Durai.ManickamKR
[not found] ` <20221031033653.43269-3-durai.manickamkr@microchip.com>
2022-10-31 10:23 ` [PATCHv1 2/8] ARM: dts: at91: sam9x60: remove flexcom definitions Claudiu.Beznea
[not found] ` <20221031033653.43269-2-durai.manickamkr@microchip.com>
2022-10-31 10:22 ` [PATCHv1 1/8] ARM: dts: at91: sam9x60: Fix the label numbering for the flexcom functions Claudiu.Beznea
2022-10-31 10:25 ` Claudiu.Beznea
[not found] ` <20221031033653.43269-7-durai.manickamkr@microchip.com>
2022-10-31 10:28 ` [PATCHv1 6/8] ARM: dts: at91: sam9x60: Add missing flexcom definitions Claudiu.Beznea
2022-11-15 5:40 ` Durai.ManickamKR [this message]
[not found] ` <20221031033653.43269-8-durai.manickamkr@microchip.com>
2022-10-31 10:29 ` [PATCHv1 7/8] dt-bindings: arm: at91: Add info on SAM9X60-CURIOSITY Claudiu.Beznea
[not found] ` <20221031033653.43269-9-durai.manickamkr@microchip.com>
2022-10-31 10:29 ` [PATCHv1 8/8] ARM: dts: at91: sam9x60_curiosity: Add device tree for sam9x60_curiosity board Claudiu.Beznea
[not found] ` <20221031033653.43269-4-durai.manickamkr@microchip.com>
2022-10-31 10:24 ` [PATCHv1 3/8] ARM: dts: at91: sam9x60: Add flexcom definitions Claudiu.Beznea
2022-10-31 10:27 ` Claudiu.Beznea
2022-11-08 13:37 ` Nicolas Ferre
2022-11-15 5:33 ` Durai.ManickamKR
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e0ca517d-30d7-db19-4a67-073ae4411a2f@microchip.com \
--to=durai.manickamkr@microchip.com \
--cc=Claudiu.Beznea@microchip.com \
--cc=Cristian.Birsan@microchip.com \
--cc=Hari.PrasathGE@microchip.com \
--cc=Horatiu.Vultur@microchip.com \
--cc=Kavyasree.Kotagiri@microchip.com \
--cc=Manikandan.M@microchip.com \
--cc=Nicolas.Ferre@microchip.com \
--cc=alexandre.belloni@bootlin.com \
--cc=arnd@arndb.de \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=olof@lixom.net \
--cc=soc@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox