From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 40596374D1; Tue, 20 May 2025 00:15:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.67.10.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747700159; cv=none; b=jwuYCE3f9gRQGL6nfPWjNzYE/FiJjPPcZHkrxTfcPOPN8fmJJTc5qFk7egWcv5cEC1jYYAhU7IengNsgBH09QOHUsFWHc+m11XAKXvDc1LaJCIOA+PqB4RYxnwbxKOltYxOFkNH9vVHVzS0GZjr9aa7JgS9vDRKc9qF7sRIg/gg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747700159; c=relaxed/simple; bh=TU1PuU20ULP0nxdQLvR4OMMp/ktsrxHvmhb+Ek+jIT8=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=Zm5R2cwwpw+S5xu0Lxnnxg/wmHFhKTdlk04k7hKJjpKaAgLJYnCRqpXBQRqLiFP0r3uzilYsrXpxGYYC9LGCMwYgwh5NoOnH2uLAy0yhm7scO4xr/BamcFXI1nLe/REuulzMPtY61eYTeJJSSyVOpBfJaz+e21MK+vAzuW/h6wM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch; spf=pass smtp.mailfrom=lunn.ch; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b=INrmpwCZ; arc=none smtp.client-ip=156.67.10.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="INrmpwCZ" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=7MeXPOcFmUddS1SAwooWtuqxeKXe3n1iDcpVdycH0O0=; b=INrmpwCZhz1VbKAkkOBF7qF6SG 7c7735Eoz0KbjiO9TR8P6WUZBywZ893FV3XP+efpALN/Pcn5HyDFmUSsFKNq1/wXMx9mK0SqTdkvb mruwi448TfW+h/FHiz5+0kQUtLMZQ5qsM0mipnN3VlZ8gvCSNaG+sDaaAcCbdN8RbXB0=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1uHAe1-00D4ER-DB; Tue, 20 May 2025 02:15:45 +0200 Date: Tue, 20 May 2025 02:15:45 +0200 From: Andrew Lunn To: Jonas Gorski Cc: Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vivien Didelot , =?iso-8859-1?Q?=C1lvaro_Fern=E1ndez?= Rojas , Florian Fainelli , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net 2/3] net: dsa: b53: fix configuring RGMII delay on bcm63xx Message-ID: References: <20250519174550.1486064-1-jonas.gorski@gmail.com> <20250519174550.1486064-3-jonas.gorski@gmail.com> <2e5e16a1-e59e-470d-a1d9-618a1b9efdd4@lunn.ch> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: > Without this change no mode/port works, since there is always either a > 0 ns delay or a 4 ns delay in the rx/tx paths (I assume, I have no > equipment to measure). > > With this change all modes/ports work. Which is wrong. > With "rgmii-id" the mac doesn't > configure any delays (and the phy does instead), with "rgmii" it's > vice versa, so there is always the expected 2 ns delay. Same for rxid > and txid. If you read the description of what these four modes mean, you should understand why only one should work. And given the most likely PCB design, the only mode that should work is rgmii-id. You would have to change the PCB design, to make the other modes work. > The Switch is always integrated into the host SoC, so there is no > (r)gmii cpu port to configure. There's basically directly attached DMA > to/from the buffers of the cpu port. Not sure if there are even > buffers, or if it is a direct to DMA delivery. That makes it a lot simpler. It always plays the MAC side. So i recommend you just hard code it no delay, and let the PHY add the delays as needed. Andrew