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From: Ivan Vecera <ivecera@redhat.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: netdev@vger.kernel.org,
	Vadim Fedorenko <vadim.fedorenko@linux.dev>,
	Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
	Jiri Pirko <jiri@resnulli.us>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Prathosh Satish <Prathosh.Satish@microchip.com>,
	Lee Jones <lee@kernel.org>, Kees Cook <kees@kernel.org>,
	Andy Shevchenko <andy@kernel.org>,
	Andrew Morton <akpm@linux-foundation.org>,
	Michal Schmidt <mschmidt@redhat.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-hardening@vger.kernel.org
Subject: Re: [PATCH v3 net-next 5/8] mfd: zl3073x: Add functions to work with register mailboxes
Date: Thu, 17 Apr 2025 12:02:03 +0200	[thread overview]
Message-ID: <e22193d6-8d00-4dbc-99be-55a9d6429730@redhat.com> (raw)
In-Reply-To: <CAAVpwAvVO7RGLGMXCBxCD35kKCLmZEkeXuERG0C2GHP54kCGJw@mail.gmail.com>



On 16. 04. 25 8:27 odp., Ivan Vecera wrote:
> On Wed, Apr 16, 2025 at 7:32 PM Andrew Lunn <andrew@lunn.ch> wrote:
>>
>>> +/**
>>> + * zl3073x_mb_dpll_read - read given DPLL configuration to mailbox
>>> + * @zldev: pointer to device structure
>>> + * @index: DPLL index
>>> + *
>>> + * Reads configuration of given DPLL into DPLL mailbox.
>>> + *
>>> + * Context: Process context. Expects zldev->regmap_lock to be held by caller.
>>> + * Return: 0 on success, <0 on error
>>> + */
>>> +int zl3073x_mb_dpll_read(struct zl3073x_dev *zldev, u8 index)
>>> +{
>>> +     int rc;
>>
>> lockdep_assert_held(zldev->regmap_lock) is stronger than having a
>> comment. When talking about i2c and spi devices, it costs nothing, and
>> catches bugs early.
> 
> Makes sense to put the assert here...
> 
> Will add.
> 
>>
>>> +/*
>>> + * Mailbox operations
>>> + */
>>> +int zl3073x_mb_dpll_read(struct zl3073x_dev *zldev, u8 index);
>>> +int zl3073x_mb_dpll_write(struct zl3073x_dev *zldev, u8 index);
>>> +int zl3073x_mb_output_read(struct zl3073x_dev *zldev, u8 index);
>>> +int zl3073x_mb_output_write(struct zl3073x_dev *zldev, u8 index);
>>> +int zl3073x_mb_ref_read(struct zl3073x_dev *zldev, u8 index);
>>> +int zl3073x_mb_ref_write(struct zl3073x_dev *zldev, u8 index);
>>> +int zl3073x_mb_synth_read(struct zl3073x_dev *zldev, u8 index);
>>> +int zl3073x_mb_synth_write(struct zl3073x_dev *zldev, u8 index);
>>
>> I assume these are the only valid ways to access a mailbox?
>>
>> If so:
>>
>>> +static inline __maybe_unused int
>>> +zl3073x_mb_read_ref_mb_mask(struct zl3073x_dev *zldev, u16 *value)
>>> +{
>>> +     __be16 temp;
>>> +     int rc;
>>> +
>>> +     lockdep_assert_held(&zldev->mailbox_lock);
>>> +     rc = regmap_bulk_read(zldev->regmap, ZL_REG_REF_MB_MASK, &temp,
>>> +                           sizeof(temp));
>>> +     if (rc)
>>> +             return rc;
>>> +
>>> +     *value = be16_to_cpu(temp);
>>> +     return rc;
>>> +}
>>
>> These helpers can be made local to the core. You can then drop the
>> lockdep_assert_held() from here, since the only way to access them is
>> via the API you defined above, and add the checks in those API
>> functions.
> 
> This cannot be done this way... the above API just simplifies the
> operation of read and write latch registers from/to mailbox.
> 
> Whole operation is described in the commit description.
> 
> E.g. read something about DPLL1
> 1. Call zl3073x_mb_dpll_read(..., 1)
>     This selects DPLL1 in the DPLL mailbox and performs read operation
> and waits for finish
> 2. Call zl3073x_mb_read_dpll_mode()
>     This reads dpll_mode latch register
> 
> write:
> 1. Call zl3073x_mb_write_dpll_mode(...)
>     This writes mode to dpll_mode latch register
> 2. Call zl3073x_mb_dpll_read(..., 1)
>     This writes all info from latch registers to DPLL1
> 
> The point is that between step 1 and 2 nobody else cannot touch
> latch_registers or mailbox select register and op semaphore.
> 

Anyway, I have a different idea... completely abstract mailboxes from 
the caller. The mailbox content can be large and the caller is barely 
interested in all registers from the mailbox but this could be resolved 
this way:

The proposed API e.g for Ref mailbox:

int zl3073x_mb_ref_read(struct zl3073x_dev *zldev, u8 index,
                         struct zl3073x_mb_ref *mb);
int zl3073x_mb_ref_write(struct zl3073x_dev *zldev, u8 index,
                          struct zl3073x_mb_ref *mb);

struct zl3073x_mb_ref {
	u32	flags;
	u16	freq_base;
	u16	freq_mult;
	u16	ratio_m;
	u16	ratio_n;
	u8	config;
	u64	phase_offset_compensation;
	u8	sync_ctrl;
	u32	esync_div;
}

#define ZL3073X_MB_REF_FREQ_BASE			BIT(0)
#define ZL3073X_MB_REF_FREQ_MULT			BIT(1)
#define ZL3073X_MB_REF_RATIO_M				BIT(2)
#define ZL3073X_MB_REF_RATIO_N			 	BIT(3)
#define ZL3073X_MB_REF_CONFIG			 	BIT(4)
#define ZL3073X_MB_REF_PHASE_OFFSET_COMPENSATION 	BIT(5)
#define ZL3073X_MB_REF_SYNC_CTRL			BIT(6)
#define ZL3073X_MB_REF_ESYNC_DIV			BIT(7)

Then a reader can read this way (read freq and ratio of 3rd ref):
{
	struct zl3073x_mb_ref mb;
	...
	mb.flags = ZL3073X_MB_REF_FREQ_BASE |
		   ZL3073X_MB_REF_FREQ_MULT |
		   ZL3073X_MB_REF_RATIO_M |
		   ZL3073X_MB_REF_RATIO_N;
	rc = zl3073x_mb_ref_read(zldev, 3, &mb);
	if (rc)
		return rc;
	/* at this point mb fields requested via flags are filled */
}
A writer similarly (write config of 5th ref):
{
	struct zl3073x_mb_ref mb;
	...
	mb.flags = ZL3073X_MB_REF_CONFIG;
	mb.config = FIELD_PREP(SOME_MASK, SOME_VALUE);
	rc = zl3073x_mb_ref_write(zldev, 5, &mb);
	...
	/* config of 5th ref was commited */
}

The advantages:
* no explicit locking required from the callers
* locking is done inside mailbox API
* each mailbox type can have different mutex so multiple calls for
   different mailbox types (e.g ref & output) can be done in parallel

WDYT about this approach?

Thanks,
Ivan


  reply	other threads:[~2025-04-17 10:02 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-16 16:21 [PATCH v3 net-next 00/10] Add Microchip ZL3073x support (part 1) Ivan Vecera
2025-04-16 16:21 ` [PATCH v3 net-next 1/8] dt-bindings: dpll: Add device tree bindings for DPLL device and pin Ivan Vecera
2025-04-21 22:20   ` Rob Herring
2025-04-21 22:29     ` Rob Herring
2025-04-16 16:21 ` [PATCH v3 net-next 2/8] dt-bindings: dpll: Add support for Microchip Azurite chip family Ivan Vecera
2025-04-16 17:42   ` Rob Herring (Arm)
2025-04-16 18:29     ` Ivan Vecera
2025-04-17  5:54       ` Krzysztof Kozlowski
2025-04-16 16:21 ` [PATCH v3 net-next 3/8] mfd: Add Microchip ZL3073x support Ivan Vecera
2025-04-16 17:11   ` Andrew Lunn
     [not found]     ` <CAAVpwAsw4-7n_iV=8aXp7=X82Mj7M-vGAc3f-fVbxxg0qgAQQA@mail.gmail.com>
2025-04-17 13:13       ` Andrew Lunn
2025-04-17 14:50         ` Ivan Vecera
2025-04-17 15:12           ` Ivan Vecera
2025-04-17 15:42             ` Andy Shevchenko
2025-04-17 16:29               ` Ivan Vecera
2025-04-17 16:35                 ` Andy Shevchenko
2025-04-18 20:18             ` Andrew Lunn
2025-04-17 15:51   ` Andy Shevchenko
2025-04-17 15:57   ` Mark Brown
2025-04-16 16:21 ` [PATCH v3 net-next 4/8] mfd: zl3073x: Add support for devlink device info Ivan Vecera
2025-04-17 15:53   ` Andy Shevchenko
2025-04-16 16:21 ` [PATCH v3 net-next 5/8] mfd: zl3073x: Add functions to work with register mailboxes Ivan Vecera
2025-04-16 17:32   ` Andrew Lunn
2025-04-16 18:27     ` Ivan Vecera
2025-04-17 10:02       ` Ivan Vecera [this message]
2025-04-17 13:27         ` Andrew Lunn
2025-04-17 14:15           ` Ivan Vecera
2025-04-24 15:49             ` Lee Jones
2025-04-17 13:22       ` Andrew Lunn
2025-04-17 14:18         ` Ivan Vecera
2025-04-17 16:13   ` Lee Jones
2025-04-17 16:35     ` Ivan Vecera
2025-04-16 16:21 ` [PATCH v3 net-next 6/8] mfd: zl3073x: Add clock_id field Ivan Vecera
2025-04-16 16:21 ` [PATCH v3 net-next 7/8] mfd: zl3073x: Fetch invariants during probe Ivan Vecera
2025-04-16 16:21 ` [PATCH v3 net-next 8/8] mfd: zl3073x: Register DPLL sub-device during init Ivan Vecera
2025-04-17 16:20   ` Lee Jones
2025-04-17 16:40     ` Ivan Vecera
2025-04-24 15:34       ` Lee Jones
2025-04-24 15:36         ` Lee Jones

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