From: Mathias Nyman <mathias.nyman@linux.intel.com>
To: Michal Pecio <michal.pecio@gmail.com>,
Mathias Nyman <mathias.nyman@intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
Niklas Neronin <niklas.neronin@linux.intel.com>
Subject: Re: [PATCH] usb: xhci: Enable the TRB overfetch quirk on VIA VL805
Date: Fri, 10 Jan 2025 13:56:21 +0200 [thread overview]
Message-ID: <e265a4b8-7bf8-49ff-9073-d150892bb6dd@linux.intel.com> (raw)
In-Reply-To: <20250107153509.727b981e@foxbook>
On 7.1.2025 16.35, Michal Pecio wrote:
> Raspberry Pi is a major user of those chips and they discovered a bug -
> when the end of a transfer ring segment is reached, up to four TRBs can
> be prefetched from the next page even if the segment ends with link TRB
> and on page boundary (the chip claims to support standard 4KB pages).
>
> It also appears that if the prefetched TRBs belong to a different ring
> whose doorbell is later rung, they may be used without refreshing from
> system RAM and the endpoint will stay idle if their cycle bit is stale.
>
> Other users complain about IOMMU faults on x86 systems, unsurprisingly.
>
> Deal with it by using existing quirk which allocates a dummy page after
> each transfer ring segment. This was seen to resolve both problems. RPi
> came up with a more efficient solution, shortening each segment by four
> TRBs, but it complicated the driver and they ditched it for this quirk.
>
> Also rename the quirk and add VL805 device ID macro.
>
> Signed-off-by: Michal Pecio <michal.pecio@gmail.com>
> Link: https://github.com/raspberrypi/linux/issues/4685
> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=215906
> CC: stable@vger.kernel.org
Thanks, adding to queue
-Mathias
prev parent reply other threads:[~2025-01-10 11:55 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-07 14:35 [PATCH] usb: xhci: Enable the TRB overfetch quirk on VIA VL805 Michal Pecio
2025-01-10 11:56 ` Mathias Nyman [this message]
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