From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Marek Vasut <marek.vasut@gmail.com>,
Mason Yang <masonccyang@mxic.com.tw>,
broonie@kernel.org, linux-kernel@vger.kernel.org,
linux-spi@vger.kernel.org, bbrezillon@kernel.org,
linux-renesas-soc@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>
Cc: juliensu@mxic.com.tw, Simon Horman <horms@verge.net.au>,
zhengxunli@mxic.com.tw
Subject: Re: [PATCH v6 2/2] dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings
Date: Fri, 18 Jan 2019 11:23:40 +0300 [thread overview]
Message-ID: <e3843856-fe6b-dfea-ffbe-07398aabc4cf@cogentembedded.com> (raw)
In-Reply-To: <8367577a-9717-92e3-cbc8-8dee52876bcb@gmail.com>
Hello!
On 18.01.2019 9:16, Marek Vasut wrote:
>> Document the bindings used by the Renesas R-Car Gen3 RPC-IF controller.
>>
>> Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
>> ---
>> .../devicetree/bindings/spi/spi-renesas-rpc.txt | 37 ++++++++++++++++++++++
>> 1 file changed, 37 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt
>>
>> diff --git a/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt
>> new file mode 100644
>> index 0000000..9b5001e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt
>> @@ -0,0 +1,37 @@
>> +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings
>> +----------------------------------------------------------
>> +
>> +Required properties:
>> +- compatible: should be "renesas,rcar-gen3-rpc"
>> +- #address-cells: should be 1
>> +- #size-cells: should be 0
>> +- reg: should contain three register areas:
>> + first for the base address of rpc-if registers,
>> + second for the direct mapping read mode and
>> + third for the write buffer area.
>> +- reg-names: should contain "regs", "dirmap" and "wbuf"
>> +- clock-names: should contain "rpc"
>> +- clocks: should contain 1 entries for the module's clock
>> +
>> +Example:
>> +
>> + rpc: rpc@ee200000 {
>> + compatible = "renesas,rcar-gen3-rpc";
>> + reg = <0 0xee200000 0 0x7fff>, <0 0x08000000 0 0x4000000>,
>
> 0x7fff should be 0x8000 , right ?
Even 0x200.
>
>> + <0 0xee208000 0 0x100>;
>
> Isn't the write buffer part of the RPC-IF register set ?
No, if you look into the manual.
MBR, Sergei
next prev parent reply other threads:[~2019-01-18 8:23 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-18 5:54 [PATCH v6 0/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI driver Mason Yang
2019-01-18 5:54 ` [PATCH v6 1/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver Mason Yang
2019-01-18 8:25 ` Geert Uytterhoeven
2019-01-18 19:43 ` Sergei Shtylyov
[not found] ` <OFE50FED81.5C117A38-ON48258389.0012FCE2-48258389.00139BD2@mxic.com.tw>
2019-01-21 18:14 ` Sergei Shtylyov
2019-01-18 5:54 ` [PATCH v6 2/2] dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings Mason Yang
2019-01-18 6:16 ` Marek Vasut
[not found] ` <OF914E6438.79205FE6-ON48258386.002973E8-48258386.002A41F0@mxic.com.tw>
2019-01-18 7:46 ` Marek Vasut
2019-01-18 8:23 ` Sergei Shtylyov [this message]
2019-01-18 8:03 ` Geert Uytterhoeven
2019-01-18 8:08 ` Marek Vasut
2019-01-18 8:10 ` Geert Uytterhoeven
2019-01-18 8:12 ` Marek Vasut
[not found] ` <OFBD5366C8.433ADACB-ON48258386.00336667-48258386.00340E20@mxic.com.tw>
2019-01-18 10:39 ` Geert Uytterhoeven
2019-01-18 8:18 ` Sergei Shtylyov
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