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From: Chris Wilson <chris@chris-wilson.co.uk>
To: Keith Packard <keithp@keithp.com>, intel-gfx@lists.freedesktop.org
Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Keith Packard <keithp@keithp.com>
Subject: Re: [PATCH 6/7] drm/i915: Try harder during dp pattern 1 link training
Date: Wed, 02 Nov 2011 09:12:13 +0000	[thread overview]
Message-ID: <e39f63$2h6thv@fmsmga002.fm.intel.com> (raw)
In-Reply-To: <1320214830-12696-7-git-send-email-keithp@keithp.com>

On Tue,  1 Nov 2011 23:20:29 -0700, Keith Packard <keithp@keithp.com> wrote:
> Instead of going through the sequence just once, run through the whole
> set up to 5 times to see if something can work. This isn't part of the
> DP spec, but the BIOS seems to do it, and given that link training
> failure is so bad, it seems reasonable to follow suit.
> 
> Signed-off-by: Keith Packard <keithp@keithp.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c |   41 +++++++++++++++++++++++++-------------
>  1 files changed, 27 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 6be6a04..bf20a35 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1576,8 +1576,9 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
>  
>  	ret = intel_dp_aux_native_write(intel_dp,
>  					DP_TRAINING_LANE0_SET,
> -					intel_dp->train_set, 4);
> -	if (ret != 4)
> +					intel_dp->train_set,
> +					intel_dp->lane_count);
> +	if (ret != intel_dp->lane_count)
>  		return false;

This would seem to be a separate chunk to initiate training on only the
lanes we intend to use.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

  reply	other threads:[~2011-11-02  9:12 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-11-02  6:20 [PATCH 0/7] drm/i915: Fix PCH eDP support for SNB Keith Packard
2011-11-02  6:20 ` [PATCH 1/7] drm/i915: Move common PCH_PP_CONTROL setup to ironlake_get_pp_control Keith Packard
2011-11-02 16:02   ` [Intel-gfx] " Jesse Barnes
2011-11-02 16:13     ` Keith Packard
2011-11-02  6:20 ` [PATCH 2/7] drm/i915: Remove link_status field from intel_dp structure Keith Packard
2011-11-02 16:13   ` [Intel-gfx] " Jesse Barnes
2011-11-02  6:20 ` [PATCH 3/7] drm/i915: Treat PCH eDP like DP in most places Keith Packard
2011-11-02 15:29   ` [Intel-gfx] " Adam Jackson
2011-11-02 16:55     ` Keith Packard
2011-11-02 17:35     ` Keith Packard
2011-11-02 16:20   ` Jesse Barnes
2011-11-02 17:10     ` Keith Packard
2011-11-02 17:13     ` Adam Jackson
2011-11-02 17:31       ` Keith Packard
2011-11-02 19:36         ` Adam Jackson
2011-11-02 20:05           ` Keith Packard
2011-11-02 20:35             ` Adam Jackson
2011-11-02 21:13               ` Keith Packard
2011-11-02 21:16                 ` Adam Jackson
2011-11-02 18:54   ` Keith Packard
2011-11-02 19:07     ` Alex Deucher
2011-11-02  6:20 ` [PATCH 4/7] drm/i915: Let panel power sequencing hardware do its job Keith Packard
2011-11-02  7:31   ` Keith Packard
2011-11-02 16:23     ` [Intel-gfx] " Jesse Barnes
2011-11-02 17:14       ` Keith Packard
2011-11-02 17:37       ` Keith Packard
2011-11-03 19:57   ` Jesse Barnes
2011-11-03 22:01     ` Keith Packard
2011-11-02  6:20 ` [PATCH 5/7] drm/i915: Make DP prepare/commit consistent with DP dpms Keith Packard
2011-11-03 20:00   ` [Intel-gfx] " Jesse Barnes
2011-11-03 22:30     ` Keith Packard
2011-11-03 22:41       ` Jesse Barnes
2011-11-03 22:59         ` Keith Packard
2011-11-02  6:20 ` [PATCH 6/7] drm/i915: Try harder during dp pattern 1 link training Keith Packard
2011-11-02  9:12   ` Chris Wilson [this message]
2011-11-02 17:20     ` Keith Packard
2011-11-02 17:38     ` Keith Packard
2011-11-03 20:03   ` [Intel-gfx] " Jesse Barnes
2011-11-03 22:32     ` Keith Packard
2011-11-02  6:20 ` [PATCH 7/7] drm/i915: Remove trailing white space Keith Packard
2011-11-03 20:03   ` [Intel-gfx] " Jesse Barnes
2011-11-03 22:36     ` Keith Packard
2011-11-03 22:48     ` Keith Packard

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