From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-172.mta0.migadu.com (out-172.mta0.migadu.com [91.218.175.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ABCA0332EC5 for ; Thu, 26 Feb 2026 11:38:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772105908; cv=none; b=hbWDoBhVwEMhmvws+c9JL7Z088R/1mRLsHmRjUb6fp9+5+7IOXkU2PhsuZxw7VeGmKziLt0vwWfOmzxbpjtr/c/M3K+X+vk6h2vlB8BALzlTpfJfO86pdrHyf24fEVKkt7vTqiY6ias1qK8eNtuNt8z+tmy6+zKNXHZQ3HLZYLw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772105908; c=relaxed/simple; bh=kiZlvDtHTgwzoMQDveqxFFIRufbDKOxBRz+/jwOuhnM=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=kd1FueMRqUlCs+WFHINb5OqG+2chGoy5xL2pe2CozKqgq6/HoRyA69kluy1xlRI0/f+LOIa/hsL6AjkB2eKlvL0Hl8P9hqGkREIadsxSXJQ/aS6KlLW39Ni/zgR8sKOTi96COyX3z0G42xWKReR0snQlmgvTHPqg7wHNYg8+BuQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=lJPkmtZ5; arc=none smtp.client-ip=91.218.175.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="lJPkmtZ5" Message-ID: DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1772105904; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oVaH2AoHyrpbqPRn9gALiYtw4uFm/ie/8+RysyrQGzU=; b=lJPkmtZ530h0RaT4fu91t/bNwWMNVEIXdYTEi99XumvWDHNOWee3IjKoAVImZWm7XhGvax qFCbJBGfyInnEuhW3QlCU4zoZFi8xwNvrt/aByDnCLNcPJIwuToPOKUcbglYKAHVqf4PSY 9Koo9hEPLX0q59Rbu+eHXWAkrNeJw84= Date: Thu, 26 Feb 2026 19:37:57 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Subject: Re: [PATCH v4 3/3] x86/tlb: add architecture-specific TLB IPI optimization support Content-Language: en-US To: Sean Christopherson Cc: akpm@linux-foundation.org, david@kernel.org, dave.hansen@intel.com, dave.hansen@linux.intel.com, ypodemsk@redhat.com, hughd@google.com, will@kernel.org, aneesh.kumar@kernel.org, npiggin@gmail.com, peterz@infradead.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, x86@kernel.org, hpa@zytor.com, arnd@arndb.de, lorenzo.stoakes@oracle.com, ziy@nvidia.com, baolin.wang@linux.alibaba.com, Liam.Howlett@oracle.com, npache@redhat.com, ryan.roberts@arm.com, dev.jain@arm.com, baohua@kernel.org, shy828301@gmail.com, riel@surriel.com, jannh@google.com, jgross@suse.com, pbonzini@redhat.com, boris.ostrovsky@oracle.com, virtualization@lists.linux.dev, kvm@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, ioworker0@gmail.com References: <20260202074557.16544-1-lance.yang@linux.dev> <20260202074557.16544-4-lance.yang@linux.dev> X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Lance Yang In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Migadu-Flow: FLOW_OUT On 2026/2/26 04:11, Sean Christopherson wrote: > On Mon, Feb 02, 2026, Lance Yang wrote: >> diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c >> index 37dc8465e0f5..6a5e47ee4eb6 100644 >> --- a/arch/x86/kernel/kvm.c >> +++ b/arch/x86/kernel/kvm.c >> @@ -856,6 +856,12 @@ static void __init kvm_guest_init(void) >> #ifdef CONFIG_SMP >> if (pv_tlb_flush_supported()) { >> pv_ops.mmu.flush_tlb_multi = kvm_flush_tlb_multi; >> + /* >> + * KVM's flush implementation calls native_flush_tlb_multi(), >> + * which sends real IPIs when INVLPGB is not available. > > Not on all (virtual) CPUs. The entire point of KVM's PV TLB flush is to elide > the IPIs. If a vCPU was scheduled out by the host, the guest sets a flag and > relies on the host to flush the TLB on behalf of the guest prior to the next > VM-Enter. Ah, I see. Thanks for the correction! KVM only sends IPIs to running vCPUs; preempted ones are left out of the mask and flushed on VM-Enter. So the old comment was wrong ... IIUC, we still set the flag to true because only running vCPUs can be in a software/lockless walk, and they all get the IPI, so the flush is enough. Does that match what you had in mind? Thanks, Lance > > for_each_cpu(cpu, flushmask) { > /* > * The local vCPU is never preempted, so we do not explicitly > * skip check for local vCPU - it will never be cleared from > * flushmask. > */ > src = &per_cpu(steal_time, cpu); > state = READ_ONCE(src->preempted); > if ((state & KVM_VCPU_PREEMPTED)) { > if (try_cmpxchg(&src->preempted, &state, > state | KVM_VCPU_FLUSH_TLB)) > __cpumask_clear_cpu(cpu, flushmask); <=== removes CPU from the IPI set > } > } > > native_flush_tlb_multi(flushmask, info); > >> + if (!cpu_feature_enabled(X86_FEATURE_INVLPGB)) >> + pv_ops.mmu.flush_tlb_multi_implies_ipi_broadcast = true; >> pr_info("KVM setup pv remote TLB flush\n"); >> }