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([2001:818:ea8e:7f00:2575:914:eedd:620e]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a8e4c1f2esm12590370f8f.98.2025.01.13.08.10.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jan 2025 08:10:21 -0800 (PST) Message-ID: Subject: Re: [PATCH v3 7/9] iio: dac: ad3552r: share model data structures From: Nuno =?ISO-8859-1?Q?S=E1?= To: Angelo Dureghello , Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , David Lechner , Nuno Sa Cc: Jonathan Cameron , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Date: Mon, 13 Jan 2025 16:10:21 +0000 In-Reply-To: <20250110-wip-bl-ad3552r-axi-v0-iio-testing-carlos-v3-7-ab42aef0d840@baylibre.com> References: <20250110-wip-bl-ad3552r-axi-v0-iio-testing-carlos-v3-0-ab42aef0d840@baylibre.com> <20250110-wip-bl-ad3552r-axi-v0-iio-testing-carlos-v3-7-ab42aef0d840@baylibre.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.54.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Fri, 2025-01-10 at 11:24 +0100, Angelo Dureghello wrote: > From: Angelo Dureghello >=20 > Preparing for new parts to be added also in the hs driver, > set model data structures in ad3552r-common.c, to be accessible > from both -hs and non hs driver. >=20 > Signed-off-by: Angelo Dureghello > --- Reviewed-by: Nuno Sa > =C2=A0drivers/iio/dac/ad3552r-common.c | 46 +++++++++++++++++++++++++++++= +++++++--- > - > =C2=A0drivers/iio/dac/ad3552r-hs.c=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0 8 ----= --- > =C2=A0drivers/iio/dac/ad3552r.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= | 36 ------------------------------- > =C2=A0drivers/iio/dac/ad3552r.h=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= |=C2=A0 6 ++++-- > =C2=A04 files changed, 46 insertions(+), 50 deletions(-) >=20 > diff --git a/drivers/iio/dac/ad3552r-common.c b/drivers/iio/dac/ad3552r- > common.c > index 03e0864f5084..ded90bf57baf 100644 > --- a/drivers/iio/dac/ad3552r-common.c > +++ b/drivers/iio/dac/ad3552r-common.c > @@ -11,23 +11,21 @@ > =C2=A0 > =C2=A0#include "ad3552r.h" > =C2=A0 > -const s32 ad3552r_ch_ranges[AD3552R_MAX_RANGES][2] =3D { > +static const s32 ad3552r_ch_ranges[AD3552R_MAX_RANGES][2] =3D { > =C2=A0 [AD3552R_CH_OUTPUT_RANGE_0__2P5V] =3D { 0, 2500 }, > =C2=A0 [AD3552R_CH_OUTPUT_RANGE_0__5V] =3D { 0, 5000 }, > =C2=A0 [AD3552R_CH_OUTPUT_RANGE_0__10V] =3D { 0, 10000 }, > =C2=A0 [AD3552R_CH_OUTPUT_RANGE_NEG_5__5V] =3D { -5000, 5000 }, > =C2=A0 [AD3552R_CH_OUTPUT_RANGE_NEG_10__10V] =3D { -10000, 10000 } > =C2=A0}; > -EXPORT_SYMBOL_NS_GPL(ad3552r_ch_ranges, "IIO_AD3552R"); > =C2=A0 > -const s32 ad3542r_ch_ranges[AD3542R_MAX_RANGES][2] =3D { > +static const s32 ad3542r_ch_ranges[AD3542R_MAX_RANGES][2] =3D { > =C2=A0 [AD3542R_CH_OUTPUT_RANGE_0__2P5V] =3D { 0, 2500 }, > =C2=A0 [AD3542R_CH_OUTPUT_RANGE_0__5V] =3D { 0, 5000 }, > =C2=A0 [AD3542R_CH_OUTPUT_RANGE_0__10V] =3D { 0, 10000 }, > =C2=A0 [AD3542R_CH_OUTPUT_RANGE_NEG_5__5V] =3D { -5000, 5000 }, > =C2=A0 [AD3542R_CH_OUTPUT_RANGE_NEG_2P5__7P5V] =3D { -2500, 7500 } > =C2=A0}; > -EXPORT_SYMBOL_NS_GPL(ad3542r_ch_ranges, "IIO_AD3552R"); > =C2=A0 > =C2=A0/* Gain * AD3552R_GAIN_SCALE */ > =C2=A0static const s32 gains_scaling_table[] =3D { > @@ -37,6 +35,46 @@ static const s32 gains_scaling_table[] =3D { > =C2=A0 [AD3552R_CH_GAIN_SCALING_0_125] =3D 125 > =C2=A0}; > =C2=A0 > +const struct ad3552r_model_data ad3541r_model_data =3D { > + .model_name =3D "ad3541r", > + .chip_id =3D AD3541R_ID, > + .num_hw_channels =3D 1, > + .ranges_table =3D ad3542r_ch_ranges, > + .num_ranges =3D ARRAY_SIZE(ad3542r_ch_ranges), > + .requires_output_range =3D true, > +}; > +EXPORT_SYMBOL_NS_GPL(ad3541r_model_data, "IIO_AD3552R"); > + > +const struct ad3552r_model_data ad3542r_model_data =3D { > + .model_name =3D "ad3542r", > + .chip_id =3D AD3542R_ID, > + .num_hw_channels =3D 2, > + .ranges_table =3D ad3542r_ch_ranges, > + .num_ranges =3D ARRAY_SIZE(ad3542r_ch_ranges), > + .requires_output_range =3D true, > +}; > +EXPORT_SYMBOL_NS_GPL(ad3542r_model_data, "IIO_AD3552R"); > + > +const struct ad3552r_model_data ad3551r_model_data =3D { > + .model_name =3D "ad3551r", > + .chip_id =3D AD3551R_ID, > + .num_hw_channels =3D 1, > + .ranges_table =3D ad3552r_ch_ranges, > + .num_ranges =3D ARRAY_SIZE(ad3552r_ch_ranges), > + .requires_output_range =3D false, > +}; > +EXPORT_SYMBOL_NS_GPL(ad3551r_model_data, "IIO_AD3552R"); > + > +const struct ad3552r_model_data ad3552r_model_data =3D { > + .model_name =3D "ad3552r", > + .chip_id =3D AD3552R_ID, > + .num_hw_channels =3D 2, > + .ranges_table =3D ad3552r_ch_ranges, > + .num_ranges =3D ARRAY_SIZE(ad3552r_ch_ranges), > + .requires_output_range =3D false, > +}; > +EXPORT_SYMBOL_NS_GPL(ad3552r_model_data, "IIO_AD3552R"); > + > =C2=A0u16 ad3552r_calc_custom_gain(u8 p, u8 n, s16 goffs) > =C2=A0{ > =C2=A0 return FIELD_PREP(AD3552R_MASK_CH_RANGE_OVERRIDE, 1) | > diff --git a/drivers/iio/dac/ad3552r-hs.c b/drivers/iio/dac/ad3552r-hs.c > index 991b11702273..bfb6228c9b9b 100644 > --- a/drivers/iio/dac/ad3552r-hs.c > +++ b/drivers/iio/dac/ad3552r-hs.c > @@ -527,14 +527,6 @@ static int ad3552r_hs_probe(struct platform_device *= pdev) > =C2=A0 return devm_iio_device_register(&pdev->dev, indio_dev); > =C2=A0} > =C2=A0 > -static const struct ad3552r_model_data ad3552r_model_data =3D { > - .model_name =3D "ad3552r", > - .chip_id =3D AD3552R_ID, > - .num_hw_channels =3D 2, > - .ranges_table =3D ad3552r_ch_ranges, > - .num_ranges =3D ARRAY_SIZE(ad3552r_ch_ranges), > -}; > - > =C2=A0static const struct of_device_id ad3552r_hs_of_id[] =3D { > =C2=A0 { .compatible =3D "adi,ad3552r", .data =3D &ad3552r_model_data }, > =C2=A0 { } > diff --git a/drivers/iio/dac/ad3552r.c b/drivers/iio/dac/ad3552r.c > index e7206af53af6..9d28e06b80c0 100644 > --- a/drivers/iio/dac/ad3552r.c > +++ b/drivers/iio/dac/ad3552r.c > @@ -649,42 +649,6 @@ static int ad3552r_probe(struct spi_device *spi) > =C2=A0 return devm_iio_device_register(&spi->dev, indio_dev); > =C2=A0} > =C2=A0 > -static const struct ad3552r_model_data ad3541r_model_data =3D { > - .model_name =3D "ad3541r", > - .chip_id =3D AD3541R_ID, > - .num_hw_channels =3D 1, > - .ranges_table =3D ad3542r_ch_ranges, > - .num_ranges =3D ARRAY_SIZE(ad3542r_ch_ranges), > - .requires_output_range =3D true, > -}; > - > -static const struct ad3552r_model_data ad3542r_model_data =3D { > - .model_name =3D "ad3542r", > - .chip_id =3D AD3542R_ID, > - .num_hw_channels =3D 2, > - .ranges_table =3D ad3542r_ch_ranges, > - .num_ranges =3D ARRAY_SIZE(ad3542r_ch_ranges), > - .requires_output_range =3D true, > -}; > - > -static const struct ad3552r_model_data ad3551r_model_data =3D { > - .model_name =3D "ad3551r", > - .chip_id =3D AD3551R_ID, > - .num_hw_channels =3D 1, > - .ranges_table =3D ad3552r_ch_ranges, > - .num_ranges =3D ARRAY_SIZE(ad3552r_ch_ranges), > - .requires_output_range =3D false, > -}; > - > -static const struct ad3552r_model_data ad3552r_model_data =3D { > - .model_name =3D "ad3552r", > - .chip_id =3D AD3552R_ID, > - .num_hw_channels =3D 2, > - .ranges_table =3D ad3552r_ch_ranges, > - .num_ranges =3D ARRAY_SIZE(ad3552r_ch_ranges), > - .requires_output_range =3D false, > -}; > - > =C2=A0static const struct spi_device_id ad3552r_id[] =3D { > =C2=A0 { > =C2=A0 .name =3D "ad3541r", > diff --git a/drivers/iio/dac/ad3552r.h b/drivers/iio/dac/ad3552r.h > index 4b5581039ae9..3dc8d1d9c0f9 100644 > --- a/drivers/iio/dac/ad3552r.h > +++ b/drivers/iio/dac/ad3552r.h > @@ -134,8 +134,10 @@ > =C2=A0#define AD3542R_MAX_RANGES 5 > =C2=A0#define AD3552R_QUAD_SPI 2 > =C2=A0 > -extern const s32 ad3552r_ch_ranges[AD3552R_MAX_RANGES][2]; > -extern const s32 ad3542r_ch_ranges[AD3542R_MAX_RANGES][2]; > +extern const struct ad3552r_model_data ad3541r_model_data; > +extern const struct ad3552r_model_data ad3542r_model_data; > +extern const struct ad3552r_model_data ad3551r_model_data; > +extern const struct ad3552r_model_data ad3552r_model_data; > =C2=A0 > =C2=A0enum ad3552r_id { > =C2=A0 AD3541R_ID =3D 0x400b, >=20