From: Hau <hau@realtek.com>
To: Heiner Kallweit <hkallweit1@gmail.com>,
nic_swsd <nic_swsd@realtek.com>,
"andrew+netdev@lunn.ch" <andrew+netdev@lunn.ch>,
"davem@davemloft.net" <davem@davemloft.net>,
"edumazet@google.com" <edumazet@google.com>,
"kuba@kernel.org" <kuba@kernel.org>,
"pabeni@redhat.com" <pabeni@redhat.com>
Cc: "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH net-next 2/2] r8169: disable RTL8126 ZRX-DC timeout
Date: Fri, 14 Mar 2025 13:46:40 +0000 [thread overview]
Message-ID: <e626009d93cd4d5188b35ea5315b42ba@realtek.com> (raw)
In-Reply-To: <ecfc71d3-47b6-4f17-b081-69452e7884ac@gmail.com>
> External mail : This email originated from outside the organization. Do not
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>
>
>
> On 14.03.2025 08:50, ChunHao Lin wrote:
> > Disable it due to it dose not meet ZRX-DC specification. If it is
> > enabled,
>
> dose -> does
>
> > device will exit L1 substate every 100ms. Disable it for saving more
> > power in L1 substate.
> >
> > Signed-off-by: ChunHao Lin <hau@realtek.com>
> > ---
> > drivers/net/ethernet/realtek/r8169_main.c | 16 ++++++++++++++++
> > 1 file changed, 16 insertions(+)
> >
> > diff --git a/drivers/net/ethernet/realtek/r8169_main.c
> > b/drivers/net/ethernet/realtek/r8169_main.c
> > index 3c663fca07d3..dfc96b09b85e 100644
> > --- a/drivers/net/ethernet/realtek/r8169_main.c
> > +++ b/drivers/net/ethernet/realtek/r8169_main.c
> > @@ -2852,6 +2852,21 @@ static u32 rtl_csi_read(struct rtl8169_private *tp,
> int addr)
> > RTL_R32(tp, CSIDR) : ~0; }
> >
> > +static void rtl_disable_zrxdc_timeout(struct rtl8169_private *tp) {
> > + struct pci_dev *pdev = tp->pci_dev;
> > + u8 val;
> > +
> > + if (pdev->cfg_size > 0x0890 &&
> > + pci_read_config_byte(pdev, 0x0890, &val) == PCIBIOS_SUCCESSFUL
> &&
> > + pci_write_config_byte(pdev, 0x0890, val & ~BIT(0)) ==
> PCIBIOS_SUCCESSFUL)
> > + return;
> > +
> > + netdev_notice_once(tp->dev,
> > + "No native access to PCI extended config space, falling back to
> CSI\n");
> > + rtl_csi_write(tp, 0x0890, rtl_csi_read(tp, 0x0890) & ~BIT(0)); }
> > +
>
> Does the datasheet have a name for this extended config space register and
> bit 0?
> This would be better than using magic numbers.
I will try to get the name of this bit.
> I think we can factor out the extended config space access to a helper. The
> same code we have in another place already. But this can be done as a
> follow-up.
>
> > static void rtl_set_aspm_entry_latency(struct rtl8169_private *tp, u8
> > val) {
> > struct pci_dev *pdev = tp->pci_dev; @@ -3824,6 +3839,7 @@ static
> > void rtl_hw_start_8125d(struct rtl8169_private *tp)
> >
> > static void rtl_hw_start_8126a(struct rtl8169_private *tp) {
> > + rtl_disable_zrxdc_timeout(tp);
> > rtl_set_def_aspm_entry_latency(tp);
> > rtl_hw_start_8125_common(tp);
> > }
prev parent reply other threads:[~2025-03-14 13:47 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-14 7:50 [PATCH net-next 0/2] r8169: enable more devices ASPM, LTR support ChunHao Lin
2025-03-14 7:50 ` [PATCH net-next 1/2] r8169: enable RTL8168H/RTL8168EP/RTL8168FP ASPM support ChunHao Lin
2025-03-21 17:16 ` Paolo Abeni
2025-03-14 7:50 ` [PATCH net-next 2/2] r8169: disable RTL8126 ZRX-DC timeout ChunHao Lin
2025-03-14 11:33 ` Heiner Kallweit
2025-03-14 13:46 ` Hau [this message]
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