Re: [PATCH v2 1/4] dt-bindings: net: Add MTIP L2 switch description

Andrew Lunn
2025-03-28T18:31:02Z

> + /* Both PHYs (i.e. 0,1) have the same, single GPIO, */
> + /* line to handle both, their interrupts (AND'ed) */

ORed, not ANDed.

Often, the interrupt line has a weak pullup resistor, so by default it
is high. Either PHY can then pull it low, using an open collector,
which is HI-Z when not driving.

Andrew