From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Cc: "Maulik Shah (mkshah)" <maulik.shah@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Thomas Gleixner <tglx@kernel.org>,
Linus Walleij <linusw@kernel.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
Sneh Mankad <sneh.mankad@oss.qualcomm.com>
Subject: Re: [PATCH 1/5] arm64: dts: qcom: x1e80100: Remove interconnect from SCM device
Date: Wed, 18 Mar 2026 10:33:28 +0100 [thread overview]
Message-ID: <e874bfce-1cb1-4b81-8d05-557f061904f7@oss.qualcomm.com> (raw)
In-Reply-To: <jup7h7tyf4efv25mqj2sz4jmztpqbng3jgk4dvz33ec66wj4dr@kgmp5g5pnbon>
On 3/16/26 3:25 PM, Dmitry Baryshkov wrote:
> On Mon, Mar 16, 2026 at 10:39:09AM +0100, Konrad Dybcio wrote:
>> On 3/13/26 3:48 PM, Dmitry Baryshkov wrote:
>>> On Fri, Mar 13, 2026 at 12:59:46PM +0100, Konrad Dybcio wrote:
>>>> On 3/13/26 11:12 AM, Maulik Shah (mkshah) wrote:
>>>>> On 3/13/2026 7:41 AM, Dmitry Baryshkov wrote:
>>>>>> On Thu, Mar 12, 2026 at 09:26:35PM +0530, Maulik Shah wrote:
>>>>
>>>>> d) Add separate SCM child device (with interconnects) under SoC.
>>>>
>>>> We'd then have to probe it as an aux device or something, which would
>>>> either delay the probing of SCM, or introduce the need to ping-pong for
>>>> PAS availability between the API provider and consumer, since some calls
>>>> work perfectly fine without the ICC path, while others could really use
>>>> it
>>>
>>> qcom_scm_pas_is_available() ?
>>
>> This comes back to either having to wait for the interconnect provider
>> anyway, or allowing the ICC-enhanced calls to take place before they that
>> happens, stripping us of the benefits.
>
> Yes. However this way only the PAS users will have to wait (i.e.
> remoteprocs, venus, IPA, etc.). All the basic providers would be able to
> probe.
Do you then envision a separate qcom_scm_pil_is_available()?
Konrad
next prev parent reply other threads:[~2026-03-18 9:33 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-12 15:56 [PATCH 0/5] x1e80100: Enable PDC wake GPIOs and deepest idle state Maulik Shah
2026-03-12 15:56 ` [PATCH 1/5] arm64: dts: qcom: x1e80100: Remove interconnect from SCM device Maulik Shah
2026-03-13 2:11 ` Dmitry Baryshkov
2026-03-13 10:12 ` Maulik Shah (mkshah)
2026-03-13 11:59 ` Konrad Dybcio
2026-03-13 14:48 ` Dmitry Baryshkov
2026-03-16 9:39 ` Konrad Dybcio
2026-03-16 14:25 ` Dmitry Baryshkov
2026-03-18 9:33 ` Konrad Dybcio [this message]
2026-03-18 10:38 ` Dmitry Baryshkov
2026-03-18 10:39 ` Konrad Dybcio
2026-03-18 14:23 ` Dmitry Baryshkov
2026-03-13 15:17 ` Maulik Shah (mkshah)
2026-03-13 14:47 ` Dmitry Baryshkov
2026-03-13 13:56 ` Krzysztof Kozlowski
2026-03-16 4:32 ` Maulik Shah (mkshah)
2026-03-12 15:56 ` [PATCH 2/5] dt-bindings: interrupt-controller: qcom,pdc: Document reg and QMP Maulik Shah
2026-03-13 13:55 ` Krzysztof Kozlowski
2026-03-12 15:56 ` [PATCH 3/5] irqchip/qcom-pdc: Configure PDC to pass through mode Maulik Shah
2026-03-13 2:22 ` Dmitry Baryshkov
2026-03-13 6:40 ` Maulik Shah (mkshah)
2026-03-13 11:49 ` Konrad Dybcio
2026-05-22 9:26 ` Maulik Shah (mkshah)
2026-05-22 11:15 ` Stephan Gerhold
2026-03-24 2:52 ` Bjorn Andersson
2026-05-22 9:22 ` Maulik Shah (mkshah)
2026-03-12 15:56 ` [PATCH 4/5] arm64: dts: qcom: x1e80100: Add deepest idle state Maulik Shah
2026-03-13 2:30 ` Dmitry Baryshkov
2026-03-13 6:41 ` Maulik Shah (mkshah)
2026-03-13 13:57 ` Krzysztof Kozlowski
2026-03-16 4:36 ` Maulik Shah (mkshah)
2026-03-12 15:56 ` [PATCH 5/5] Revert "pinctrl: qcom: x1e80100: Bypass PDC wakeup parent for now" Maulik Shah
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