RE: wifi: rtw88: question about SDIO RX aggregation limiting

[Ping-Ke Shih <pkshih@realtek.com>]

> -----Original Message-----
> From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> Sent: Tuesday, June 20, 2023 4:38 AM
> To: Ping-Ke Shih <pkshih@realtek.com>
> Cc: linux-wireless@vger.kernel.org; Lukas F. Hartmann <lukas@mntre.com>; linux-kernel@vger.kernel.org;
> tony0620emma@gmail.com; jernej.skrabec@gmail.com
> Subject: Re: wifi: rtw88: question about SDIO RX aggregation limiting
> 
> Hello Ping-Ke,
> 
> apologies for the long delay.
> 
> On Tue, Jun 13, 2023 at 4:20 AM Ping-Ke Shih <pkshih@realtek.com> wrote:
> [...]
> > The unit of BIT_RXDMA_AGG_PG_TH is 1k bytes, so I think you can
> > set mmc_host->max_req_size/1024.
> I tried this but I got a result that I don't understand.
> I've been testing with three BIT_RXDMA_AGG_PG_TH values on a SoC that
> can handle 255 * 1024 bytes. Each time I connected to the same AP and
> downloaded a bigger file over http(s).
> BIT_RXDMA_AGG_PG_TH: biggest observed rx_len in rtw_sdio_rxfifo_recv()
> 255: 20968
> 6: 5122
> 1: 1602

Please also print out number of packets you receive, and then we can see how
many packets aggregate.

> 
> The biggest rx_len I have observed for BIT_RXDMA_AGG_PG_TH 1 looks suspicious:
> My understanding is that I shouldn't be seeing rx_len larger than
> BIT_RXDMA_AGG_PG_TH * 1024.
> BIT_RXDMA_AGG_PG_TH = 6 is within this limit but BIT_RXDMA_AGG_PG_TH =
> 1 isn't (I'm seeing 578 extra bytes in addition to the 1024 bytes that
> I was expecting).

Assume threshold is 1k, and single one packet is larger than 1k. Hardware
will not split it into two. Also, please make sure 0x280[29] BIT_EN_PRE_CALC
is 1. Otherwise, it will possibly aggregate additional one packet to over
the threshold.

0x280[15:8] is timeout time in unit of 1us for SDIO interface. When set
threshold to 255, you can enlarge this to see if it can aggregate more as
expected. 

> Do you have any idea where this is coming from? I'm worried that we
> can still end up with the problem that Lukas described but seems to
> not have hit in his testing with BIT_RXDMA_AGG_PG_TH = 6
> 
> > I wonder why 0x6 works on Amlogic SoCs. Could you or Lukas compare performance
> > between the settings of 0x1 and 0x6?
> I can do this later this week but I'd like to understand the above
> results first.
> 

Ping-Ke