From: Adrian Hunter <adrian.hunter@intel.com>
To: Giulio Benetti <giulio.benetti@benettiengineering.com>,
Haibo Chen <haibo.chen@nxp.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>,
linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Jim Reinhart <jimr@tekvox.com>,
James Autry <jautry@tekvox.com>,
Matthew Maron <matthewm@tekvox.com>
Subject: Re: [PATCH] mmc: sdhci-esdhc-imx: improve ESDHC_FLAG_ERR010450
Date: Tue, 15 Aug 2023 15:07:52 +0300 [thread overview]
Message-ID: <e921526c-0664-0312-1cdc-e53a27d7d9ce@intel.com> (raw)
In-Reply-To: <20230811214853.8623-1-giulio.benetti@benettiengineering.com>
On 12/08/23 00:48, Giulio Benetti wrote:
> Errata ERR010450 only shows up if voltage is 1.8V, but if the device is
> supplied by 3v3 the errata can be ignored. So let's check for if quirk
> SDHCI_QUIRK2_NO_1_8_V is defined or not before limiting the frequency.
>
> Sponsored by: Tekvox Inc.
> Cc: Jim Reinhart <jimr@tekvox.com>
> Cc: James Autry <jautry@tekvox.com>
> Cc: Matthew Maron <matthewm@tekvox.com>
> Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Haibo Chen, can we get an Acked-by from you?
> ---
> drivers/mmc/host/sdhci-esdhc-imx.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
> index eebf94604a7f..cddecc1e1ac2 100644
> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
> @@ -171,8 +171,8 @@
> #define ESDHC_FLAG_HS400 BIT(9)
> /*
> * The IP has errata ERR010450
> - * uSDHC: Due to the I/O timing limit, for SDR mode, SD card clock can't
> - * exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz.
> + * uSDHC: At 1.8V due to the I/O timing limit, for SDR mode, SD card
> + * clock can't exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz.
> */
> #define ESDHC_FLAG_ERR010450 BIT(10)
> /* The IP supports HS400ES mode */
> @@ -961,7 +961,8 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host,
> | ESDHC_CLOCK_MASK);
> sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
>
> - if (imx_data->socdata->flags & ESDHC_FLAG_ERR010450) {
> + if ((imx_data->socdata->flags & ESDHC_FLAG_ERR010450) &&
> + (!(host->quirks2 & SDHCI_QUIRK2_NO_1_8_V))) {
> unsigned int max_clock;
>
> max_clock = imx_data->is_ddr ? 45000000 : 150000000;
next prev parent reply other threads:[~2023-08-15 12:09 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-11 21:48 [PATCH] mmc: sdhci-esdhc-imx: improve ESDHC_FLAG_ERR010450 Giulio Benetti
2023-08-15 12:07 ` Adrian Hunter [this message]
2023-08-16 1:21 ` Bough Chen
2023-08-16 5:44 ` Adrian Hunter
2023-08-16 9:52 ` Ulf Hansson
2023-08-16 17:14 ` Giulio Benetti
2023-08-16 21:36 ` Ulf Hansson
2023-08-17 16:44 ` Giulio Benetti
2023-08-18 9:30 ` Ulf Hansson
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