From: Michael Riesch <michael.riesch@collabora.com>
To: Diederik de Haas <didi.debian@cknow.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>, Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Jagan Teki <jagan@amarulasolutions.com>,
Sebastian Reichel <sebastian.reichel@collabora.com>,
Collabora Kernel Team <kernel@collabora.com>,
Kever Yang <kever.yang@rock-chips.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-phy@lists.infradead.org
Subject: Re: [PATCH 2/5] dt-bindings: phy: rockchip-inno-csi-dphy: add rk3588 variant
Date: Wed, 18 Jun 2025 09:45:32 +0200 [thread overview]
Message-ID: <e9db11c2-b02d-4fd5-8927-7b5857089533@collabora.com> (raw)
In-Reply-To: <DAOVBOKLXLS2.S9MXDD29X68J@cknow.org>
Hi Diederik,
Thanks for your comments!
On 6/17/25 16:12, Diederik de Haas wrote:
> Hi,
>
> I'm (unfortunately) not seeing any @rock-chips.com recipients ...
Oops, I meant to include at least Kever, but forgot to do it. Will do in v2.
Cc: Kever
>
> On Tue Jun 17, 2025 at 10:54 AM CEST, Michael Riesch via B4 Relay wrote:
>> From: Michael Riesch <michael.riesch@collabora.com>
>>
>> The Rockchip RK3588 variant of the CSI-2 DPHY features two reset lines.
>> Add the variant and allow for the additional reset.
>>
>> Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
>> ---
>> .../bindings/phy/rockchip-inno-csi-dphy.yaml | 60 ++++++++++++++++++++--
>> 1 file changed, 55 insertions(+), 5 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml
>> index 5ac994b3c0aa..6755738b13ee 100644
>> --- a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml
>> +++ b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml
>> @@ -21,6 +21,7 @@ properties:
>> - rockchip,rk3326-csi-dphy
>> - rockchip,rk3368-csi-dphy
>> - rockchip,rk3568-csi-dphy
>> + - rockchip,rk3588-csi-dphy
>>
>> reg:
>> maxItems: 1
>> @@ -39,18 +40,49 @@ properties:
>> maxItems: 1
>>
>> resets:
>> - items:
>> - - description: exclusive PHY reset line
>> + minItems: 1
>> + maxItems: 2
>>
>> reset-names:
>> - items:
>> - - const: apb
>> + minItems: 1
>> + maxItems: 2
>>
>> rockchip,grf:
>> $ref: /schemas/types.yaml#/definitions/phandle
>> description:
>> Some additional phy settings are access through GRF regs.
>>
>> +allOf:
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - rockchip,px30-csi-dphy
>> + - rockchip,rk1808-csi-dphy
>> + - rockchip,rk3326-csi-dphy
>> + - rockchip,rk3368-csi-dphy
>> + - rockchip,rk3568-csi-dphy
>> + then:
>> + properties:
>> + resets:
>> + items:
>> + - description: exclusive PHY reset line
>> +
>> + reset-names:
>> + items:
>> + - const: apb
>> +
>> + required:
>> + - reset-names
>> + else:
>> + properties:
>> + resets:
>> + minItems: 2
>> +
>> + reset-names:
>> + minItems: 2
>> +
>> required:
>> - compatible
>> - reg
>> @@ -59,7 +91,6 @@ required:
>> - '#phy-cells'
>> - power-domains
>> - resets
>> - - reset-names
>> - rockchip,grf
>>
>> additionalProperties: false
>> @@ -78,3 +109,22 @@ examples:
>> reset-names = "apb";
>> rockchip,grf = <&grf>;
>> };
>> + - |
>> + #include <dt-bindings/clock/rockchip,rk3588-cru.h>
>> + #include <dt-bindings/reset/rockchip,rk3588-cru.h>
>> +
>> + soc {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> +
>> + csi_dphy0: phy@fedc0000 {
>> + compatible = "rockchip,rk3588-csi-dphy";
>> + reg = <0x0 0xfedc0000 0x0 0x8000>;
>> + clocks = <&cru PCLK_CSIPHY0>;
>> + clock-names = "pclk";
>> + #phy-cells = <0>;
>> + resets = <&cru SRST_CSIPHY0>, <&cru SRST_P_CSIPHY0>;
>> + rockchip,grf = <&csidphy0_grf>;
>> + status = "disabled";
>> + };
>> + };
>
> ... which could hopefully tell us what the value is/should be for the
> *required* 'power-domains' property, which is missing in this example.
> IOW: the binding example is invalid according to its own binding.
Huh, indeed. Hm. Why didn't make dt_binding_check warn me about that?!
TRM Part 1, p. 1097 states that HDMI_CSI_DPHY is in the ALIVE(PD_BUS)
power domain. With some creativity one can interpret that the CSI DPHY
is always on anyways. @Kever: Could you please elaborate on that?
> (btw: you can drop the 'csi_dphy0' label)
Will do.
>
> And hopefully also for rk3568 so we can add it to rk356x-base.dtsi and
> you can add it in patch 5 where it's also missing.
I recall a similar discussion [0]. In the RK3568 the CSIPHY is in the
ALIVE power domain.
Note that the PHY must not be confused with the HOST blocks, which are
the MIPI CSI-2 receivers.
I guess the correct solution is to make power-domains optional. Further
input welcome, though.
Best regards,
Michael
>
> Grepping for "csi-dphy" in arch/arm*/boot/dts/rockchip returns:
> - px30.dtsi
> - rk356x-base.dtsi
>
> With this patch set applied, we'd have a 3rd result: rk3588-base.dtsi
>
> For all the listed compatibles, it's only actually defined in px30.dtsi.
>
> Cheers (and sorry),
> Diederik
[0] https://lore.kernel.org/all/D4QNJ85V43NU.YD01E8AB4116@cknow.org/
next prev parent reply other threads:[~2025-06-18 7:45 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-17 8:54 [PATCH 0/5] phy: rockchip: phy-rockchip-inno-csidphy: add support for rk3588 variant Michael Riesch via B4 Relay
2025-06-17 8:54 ` [PATCH 1/5] dt-bindings: soc: rockchip: add rk3588 csidphy grf syscon Michael Riesch via B4 Relay
2025-06-27 19:14 ` Rob Herring (Arm)
2025-06-17 8:54 ` [PATCH 2/5] dt-bindings: phy: rockchip-inno-csi-dphy: add rk3588 variant Michael Riesch via B4 Relay
2025-06-17 9:31 ` neil.armstrong
2025-06-18 6:32 ` Michael Riesch
2025-06-19 20:11 ` Heiko Stuebner
2025-06-17 14:12 ` Diederik de Haas
2025-06-18 7:45 ` Michael Riesch [this message]
2025-06-27 19:17 ` Rob Herring
2025-06-17 8:54 ` [PATCH 3/5] phy: rockchip: phy-rockchip-inno-csidphy: allow writes to grf register 0 Michael Riesch via B4 Relay
2025-06-17 9:30 ` neil.armstrong
2025-06-17 8:54 ` [PATCH 4/5] phy: rockchip: phy-rockchip-inno-csidphy: add support for rk3588 variant Michael Riesch via B4 Relay
2025-06-17 9:36 ` neil.armstrong
2025-06-17 8:54 ` [PATCH 5/5] arm64: dts: rockchip: add mipi csi-2 dphy nodes to rk3588 Michael Riesch via B4 Relay
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