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* [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA
@ 2025-04-16 13:59 Thomas Richard
  2025-04-16 13:59 ` [PATCH v3 01/10] gpiolib: add support to register sparse pin range Thomas Richard
                   ` (6 more replies)
  0 siblings, 7 replies; 12+ messages in thread
From: Thomas Richard @ 2025-04-16 13:59 UTC (permalink / raw)
  To: Linus Walleij, Andy Shevchenko, Bartosz Golaszewski,
	Geert Uytterhoeven
  Cc: linux-gpio, linux-kernel, thomas.petazzoni, DanieleCleri,
	GaryWang, Thomas Richard

This is the third version of this series (rebased on v6.15-rc2).

The gpiolib part has been reworked, the gpiochip_add_pin_range() was
renamed to gpiochip_add_pin_range_with_pins() and a new pins parameter was
addded. Two stubs were created to add consecutive or sparse pin range.

For the forwarder library, a namespace was added and patches were splitted
to more simpler changes.

In the pinctrl core, the function devm_pinctrl_register_mappings() was
created.

No big changes in the upboard pinctrl driver, only few fixes and
improvements.

Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
---
Changes in v3:
- pinctrl: add devm_pinctrl_register_mappings()
- gpiolib: rename gpiochip_add_pin_range() to
  gpiochip_add_pin_range_with_pins() and add pins parameter
- gpiolib: add stubs gpiochip_add_pin_range() and 
  gpiochip_add_sparse_pin_range()
- aggregator: split to more simpler patches
- aggregator: add a namespace for the forwarder library
- aggregator: rename header file to forwarder.h
- aggregator: add some missing headers and declaration in forwarder.h
- aggregator: forwarder.h provides consumer.h and driver.h
- aggregator: fix error code returned by gpio_fwd_request()
- pinctrl-upboard: fix order of header files
- pinctrl-upboard: fix some nitpicks
- pinctrl-upboard: rework macros to define pin groups
- pinctrl-upboard: add missing container_of.h and err.h header files
- pinctrl-upboard: handle correctly pointer returned by dmi_first_match()
- pinctrl-upboard: use devm_pinctrl_register_mappings()
- pinctrl-upboard: import GPIO_FORWARDER namespace
- Link to v2: https://lore.kernel.org/r/20250317-aaeon-up-board-pinctrl-support-v2-0-36126e30aa62@bootlin.com

Changes in v2:
- mfd: removed driver (already merged)
- led: removed driver (already merged)
- gpio-aggregator: refactor code to create a gpio-fwd library
- pinctrl: refactor gpio part to use the gpio-fwd library
- pinctrl: add pinctrl mappings for each board

---
Thomas Richard (10):
      gpiolib: add support to register sparse pin range
      pinctrl: core: add devm_pinctrl_register_mappings()
      gpio: aggregator: move GPIO forwarder allocation in a dedicated function
      gpio: aggregator: refactor the code to add GPIO desc in the forwarder
      gpio: aggregator: refactor the forwarder registration part
      gpio: aggregator: update gpiochip_fwd_setup_delay_line() parameters
      gpio: aggregator: export symbols of the GPIO forwarder library
      gpio: aggregator: handle runtime registration of gpio_desc in gpiochip_fwd
      gpio: aggregator: add possibility to attach data to the forwarder
      pinctrl: Add pin controller driver for AAEON UP boards

 drivers/gpio/gpio-aggregator.c    |  221 +++++---
 drivers/gpio/gpiolib.c            |   29 +-
 drivers/pinctrl/Kconfig           |   18 +
 drivers/pinctrl/Makefile          |    1 +
 drivers/pinctrl/core.c            |   37 ++
 drivers/pinctrl/pinctrl-upboard.c | 1071 +++++++++++++++++++++++++++++++++++++
 include/linux/gpio/driver.h       |   51 +-
 include/linux/gpio/forwarder.h    |   63 +++
 include/linux/pinctrl/machine.h   |   10 +
 9 files changed, 1408 insertions(+), 93 deletions(-)
---
base-commit: 8a834b0ac9ceb354a6e0b8cf5b363edca8221bdd
change-id: 20240930-aaeon-up-board-pinctrl-support-98fa4a030490

Best regards,
-- 
Thomas Richard <thomas.richard@bootlin.com>


^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v3 01/10] gpiolib: add support to register sparse pin range
  2025-04-16 13:59 [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA Thomas Richard
@ 2025-04-16 13:59 ` Thomas Richard
  2025-04-17  7:51   ` Linus Walleij
  2025-04-16 13:59 ` [PATCH v3 02/10] pinctrl: core: add devm_pinctrl_register_mappings() Thomas Richard
                   ` (5 subsequent siblings)
  6 siblings, 1 reply; 12+ messages in thread
From: Thomas Richard @ 2025-04-16 13:59 UTC (permalink / raw)
  To: Linus Walleij, Andy Shevchenko, Bartosz Golaszewski,
	Geert Uytterhoeven
  Cc: linux-gpio, linux-kernel, thomas.petazzoni, DanieleCleri,
	GaryWang, Thomas Richard

Add support to register for GPIO<->pin mapping using a list of non
consecutive pins. The core already support sparse pin range (pins member
of struct pinctrl_gpio_range), but it was not possible to register one. If
pins is not NULL the core uses it, otherwise it assumes that a consecutive
pin range was registered and it uses pin_base.

The function gpiochip_add_pin_range() which allocates and fill the struct
pinctrl_gpio_range was renamed to gpiochip_add_pin_range_with_pins() and
the pins parameter was added.

Two new functions were added, gpiochip_add_pin_range() and
gpiochip_add_sparse_pin_range() to register a consecutive or sparse pins
range. Both use gpiochip_add_pin_range_with_pins().

Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
---
 drivers/gpio/gpiolib.c      | 29 ++++++++++++++++++--------
 include/linux/gpio/driver.h | 51 ++++++++++++++++++++++++++++++++++++++++++---
 2 files changed, 68 insertions(+), 12 deletions(-)

diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index e70197e39f55..6451dd4565c9 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -2285,11 +2285,13 @@ int gpiochip_add_pingroup_range(struct gpio_chip *gc,
 EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
 
 /**
- * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
+ * gpiochip_add_pin_range_with_pins() - add a range for GPIO <-> pin mapping
  * @gc: the gpiochip to add the range for
  * @pinctl_name: the dev_name() of the pin controller to map to
  * @gpio_offset: the start offset in the current gpio_chip number space
  * @pin_offset: the start offset in the pin controller number space
+ * @pins: the list of non consecutive pins to accumulate in this range (if not
+ *	NULL, pin_offset is ignored by pinctrl core)
  * @npins: the number of pins from the offset of each pin space (GPIO and
  *	pin controller) to accumulate in this range
  *
@@ -2301,9 +2303,12 @@ EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
  * Returns:
  * 0 on success, or a negative errno on failure.
  */
-int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
-			   unsigned int gpio_offset, unsigned int pin_offset,
-			   unsigned int npins)
+int gpiochip_add_pin_range_with_pins(struct gpio_chip *gc,
+				     const char *pinctl_name,
+				     unsigned int gpio_offset,
+				     unsigned int pin_offset,
+				     unsigned int const *pins,
+				     unsigned int npins)
 {
 	struct gpio_pin_range *pin_range;
 	struct gpio_device *gdev = gc->gpiodev;
@@ -2321,6 +2326,7 @@ int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
 	pin_range->range.name = gc->label;
 	pin_range->range.base = gdev->base + gpio_offset;
 	pin_range->range.pin_base = pin_offset;
+	pin_range->range.pins = pins;
 	pin_range->range.npins = npins;
 	pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
 			&pin_range->range);
@@ -2330,16 +2336,21 @@ int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
 		kfree(pin_range);
 		return ret;
 	}
-	chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
-		 gpio_offset, gpio_offset + npins - 1,
-		 pinctl_name,
-		 pin_offset, pin_offset + npins - 1);
+	if (!pin_range->range.pins)
+		chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
+			 gpio_offset, gpio_offset + npins - 1,
+			 pinctl_name,
+			 pin_offset, pin_offset + npins - 1);
+	else
+		chip_dbg(gc, "created GPIO range %d->%d ==> %s %d sparse PIN range { %d, ... }",
+			 gpio_offset, gpio_offset + npins - 1,
+			 pinctl_name, npins, pins[0]);
 
 	list_add_tail(&pin_range->node, &gdev->pin_ranges);
 
 	return 0;
 }
-EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
+EXPORT_SYMBOL_GPL(gpiochip_add_pin_range_with_pins);
 
 /**
  * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index 4c0294a9104d..6142837ea403 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -784,23 +784,68 @@ struct gpio_pin_range {
 
 #ifdef CONFIG_PINCTRL
 
-int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
-			   unsigned int gpio_offset, unsigned int pin_offset,
-			   unsigned int npins);
+int gpiochip_add_pin_range_with_pins(struct gpio_chip *gc,
+				     const char *pinctl_name,
+				     unsigned int gpio_offset,
+				     unsigned int pin_offset,
+				     unsigned int const *pins,
+				     unsigned int npins);
 int gpiochip_add_pingroup_range(struct gpio_chip *gc,
 			struct pinctrl_dev *pctldev,
 			unsigned int gpio_offset, const char *pin_group);
 void gpiochip_remove_pin_ranges(struct gpio_chip *gc);
 
+static inline int
+gpiochip_add_pin_range(struct gpio_chip *gc,
+		       const char *pinctl_name,
+		       unsigned int gpio_offset,
+		       unsigned int pin_offset,
+		       unsigned int npins)
+{
+	return gpiochip_add_pin_range_with_pins(gc, pinctl_name, gpio_offset,
+						pin_offset, NULL, npins);
+}
+
+static inline int
+gpiochip_add_sparse_pin_range(struct gpio_chip *gc,
+			      const char *pinctl_name,
+			      unsigned int gpio_offset,
+			      unsigned int const *pins,
+			      unsigned int npins)
+{
+	return gpiochip_add_pin_range_with_pins(gc, pinctl_name, gpio_offset, 0,
+						pins, npins);
+}
 #else /* ! CONFIG_PINCTRL */
 
+static inline int
+gpiochip_add_pin_range_with_pins(struct gpio_chip *gc,
+				 const char *pinctl_name,
+				 unsigned int gpio_offset,
+				 unsigned int pin_offset,
+				 unsigned int npins)
+{
+	return 0;
+}
+
 static inline int
 gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
 		       unsigned int gpio_offset, unsigned int pin_offset,
 		       unsigned int npins)
+{
+	return 0
+}
+
+static inline int
+gpiochip_add_sparse_pin_range(struct gpio_chip *gc,
+			      const char *pinctl_name,
+			      unsigned int gpio_offset,
+			      unsigned int const *pins,
+			      unsigned int npins)
 {
 	return 0;
 }
+
 static inline int
 gpiochip_add_pingroup_range(struct gpio_chip *gc,
 			struct pinctrl_dev *pctldev,

-- 
2.39.5


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v3 02/10] pinctrl: core: add devm_pinctrl_register_mappings()
  2025-04-16 13:59 [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA Thomas Richard
  2025-04-16 13:59 ` [PATCH v3 01/10] gpiolib: add support to register sparse pin range Thomas Richard
@ 2025-04-16 13:59 ` Thomas Richard
  2025-04-17  7:52   ` Linus Walleij
  2025-04-16 13:59 ` [PATCH v3 03/10] gpio: aggregator: move GPIO forwarder allocation in a dedicated function Thomas Richard
                   ` (4 subsequent siblings)
  6 siblings, 1 reply; 12+ messages in thread
From: Thomas Richard @ 2025-04-16 13:59 UTC (permalink / raw)
  To: Linus Walleij, Andy Shevchenko, Bartosz Golaszewski,
	Geert Uytterhoeven
  Cc: linux-gpio, linux-kernel, thomas.petazzoni, DanieleCleri,
	GaryWang, Thomas Richard

Using devm_pinctrl_register_mappings(), the core can automatically
unregister pinctrl mappings.

Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
---
 drivers/pinctrl/core.c          | 37 +++++++++++++++++++++++++++++++++++++
 include/linux/pinctrl/machine.h | 10 ++++++++++
 2 files changed, 47 insertions(+)

diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c
index 6dd48dd2c035..f02c45b98512 100644
--- a/drivers/pinctrl/core.c
+++ b/drivers/pinctrl/core.c
@@ -1543,6 +1543,43 @@ void pinctrl_unregister_mappings(const struct pinctrl_map *map)
 }
 EXPORT_SYMBOL_GPL(pinctrl_unregister_mappings);
 
+static void devm_pinctrl_unregister_mappings(struct device *dev, void *res)
+{
+	pinctrl_unregister_mappings(*(const struct pinctrl_map **)res);
+}
+
+/**
+ * devm_pinctrl_register_mappings() - Resource managed pinctrl_register_mappings()
+ * @dev: device for which mappings are registered
+ * @maps: the pincontrol mappings table to register. Note the pinctrl-core
+ *	keeps a reference to the passed in maps, so they should _not_ be
+ *	marked with __initdata.
+ * @num_maps: the number of maps in the mapping table
+ */
+int devm_pinctrl_register_mappings(struct device *dev,
+				   const struct pinctrl_map *maps,
+				   unsigned int num_maps)
+{
+	const struct pinctrl_map **ptr;
+	int ret;
+
+	ptr = devres_alloc(devm_pinctrl_unregister_mappings, sizeof(*ptr),
+			   GFP_KERNEL);
+	if (!ptr)
+		return -ENOMEM;
+
+	ret = pinctrl_register_mappings(maps, num_maps);
+	if (!ret) {
+		*ptr = maps;
+		devres_add(dev, ptr);
+	} else {
+		devres_free(ptr);
+	}
+
+	return ret;
+}
+EXPORT_SYMBOL_GPL(devm_pinctrl_register_mappings);
+
 /**
  * pinctrl_force_sleep() - turn a given controller device into sleep state
  * @pctldev: pin controller device
diff --git a/include/linux/pinctrl/machine.h b/include/linux/pinctrl/machine.h
index 673e96df453b..2c178328c468 100644
--- a/include/linux/pinctrl/machine.h
+++ b/include/linux/pinctrl/machine.h
@@ -155,6 +155,9 @@ struct pinctrl_map;
 
 extern int pinctrl_register_mappings(const struct pinctrl_map *map,
 				     unsigned int num_maps);
+extern int devm_pinctrl_register_mappings(struct device *dev,
+					  const struct pinctrl_map *map,
+					  unsigned int num_maps);
 extern void pinctrl_unregister_mappings(const struct pinctrl_map *map);
 extern void pinctrl_provide_dummies(void);
 #else
@@ -165,6 +168,13 @@ static inline int pinctrl_register_mappings(const struct pinctrl_map *map,
 	return 0;
 }
 
+static inline int devm_pinctrl_register_mappings(struct device *dev,
+						 const struct pinctrl_map *map,
+						 unsigned int num_maps)
+{
+	return 0;
+}
+
 static inline void pinctrl_unregister_mappings(const struct pinctrl_map *map)
 {
 }

-- 
2.39.5


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v3 03/10] gpio: aggregator: move GPIO forwarder allocation in a dedicated function
  2025-04-16 13:59 [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA Thomas Richard
  2025-04-16 13:59 ` [PATCH v3 01/10] gpiolib: add support to register sparse pin range Thomas Richard
  2025-04-16 13:59 ` [PATCH v3 02/10] pinctrl: core: add devm_pinctrl_register_mappings() Thomas Richard
@ 2025-04-16 13:59 ` Thomas Richard
  2025-04-16 13:59 ` [PATCH v3 04/10] gpio: aggregator: refactor the code to add GPIO desc in the forwarder Thomas Richard
                   ` (3 subsequent siblings)
  6 siblings, 0 replies; 12+ messages in thread
From: Thomas Richard @ 2025-04-16 13:59 UTC (permalink / raw)
  To: Linus Walleij, Andy Shevchenko, Bartosz Golaszewski,
	Geert Uytterhoeven
  Cc: linux-gpio, linux-kernel, thomas.petazzoni, DanieleCleri,
	GaryWang, Thomas Richard

Move the GPIO forwarder allocation and static initialization in a dedicated
function.

Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
---
 drivers/gpio/gpio-aggregator.c | 48 ++++++++++++++++++++++++++++--------------
 1 file changed, 32 insertions(+), 16 deletions(-)

diff --git a/drivers/gpio/gpio-aggregator.c b/drivers/gpio/gpio-aggregator.c
index d232ea865356..a5e3ae4d8813 100644
--- a/drivers/gpio/gpio-aggregator.c
+++ b/drivers/gpio/gpio-aggregator.c
@@ -498,6 +498,37 @@ static int gpiochip_fwd_setup_delay_line(struct device *dev, struct gpio_chip *c
 }
 #endif	/* !CONFIG_OF_GPIO */
 
+static struct gpiochip_fwd *
+devm_gpiochip_fwd_alloc(struct device *dev, unsigned int ngpios)
+{
+	const char *label = dev_name(dev);
+	struct gpiochip_fwd *fwd;
+	struct gpio_chip *chip;
+
+	fwd = devm_kzalloc(dev, struct_size(fwd, tmp, fwd_tmp_size(ngpios)),
+			   GFP_KERNEL);
+	if (!fwd)
+		return ERR_PTR(-ENOMEM);
+
+	chip = &fwd->chip;
+
+	chip->label = label;
+	chip->parent = dev;
+	chip->owner = THIS_MODULE;
+	chip->get_direction = gpio_fwd_get_direction;
+	chip->direction_input = gpio_fwd_direction_input;
+	chip->direction_output = gpio_fwd_direction_output;
+	chip->get = gpio_fwd_get;
+	chip->get_multiple = gpio_fwd_get_multiple_locked;
+	chip->set_rv = gpio_fwd_set;
+	chip->set_multiple_rv = gpio_fwd_set_multiple_locked;
+	chip->to_irq = gpio_fwd_to_irq;
+	chip->base = -1;
+	chip->ngpio = ngpios;
+
+	return fwd;
+}
+
 /**
  * gpiochip_fwd_create() - Create a new GPIO forwarder
  * @dev: Parent device pointer
@@ -518,14 +549,12 @@ static struct gpiochip_fwd *gpiochip_fwd_create(struct device *dev,
 						struct gpio_desc *descs[],
 						unsigned long features)
 {
-	const char *label = dev_name(dev);
 	struct gpiochip_fwd *fwd;
 	struct gpio_chip *chip;
 	unsigned int i;
 	int error;
 
-	fwd = devm_kzalloc(dev, struct_size(fwd, tmp, fwd_tmp_size(ngpios)),
-			   GFP_KERNEL);
+	fwd = devm_gpiochip_fwd_alloc(dev, ngpios);
 	if (!fwd)
 		return ERR_PTR(-ENOMEM);
 
@@ -549,19 +578,6 @@ static struct gpiochip_fwd *gpiochip_fwd_create(struct device *dev,
 			chip->set_config = gpio_fwd_set_config;
 	}
 
-	chip->label = label;
-	chip->parent = dev;
-	chip->owner = THIS_MODULE;
-	chip->get_direction = gpio_fwd_get_direction;
-	chip->direction_input = gpio_fwd_direction_input;
-	chip->direction_output = gpio_fwd_direction_output;
-	chip->get = gpio_fwd_get;
-	chip->get_multiple = gpio_fwd_get_multiple_locked;
-	chip->set_rv = gpio_fwd_set;
-	chip->set_multiple_rv = gpio_fwd_set_multiple_locked;
-	chip->to_irq = gpio_fwd_to_irq;
-	chip->base = -1;
-	chip->ngpio = ngpios;
 	fwd->descs = descs;
 
 	if (chip->can_sleep)

-- 
2.39.5


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v3 04/10] gpio: aggregator: refactor the code to add GPIO desc in the forwarder
  2025-04-16 13:59 [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA Thomas Richard
                   ` (2 preceding siblings ...)
  2025-04-16 13:59 ` [PATCH v3 03/10] gpio: aggregator: move GPIO forwarder allocation in a dedicated function Thomas Richard
@ 2025-04-16 13:59 ` Thomas Richard
  2025-04-16 13:59 ` [PATCH v3 05/10] gpio: aggregator: refactor the forwarder registration part Thomas Richard
                   ` (2 subsequent siblings)
  6 siblings, 0 replies; 12+ messages in thread
From: Thomas Richard @ 2025-04-16 13:59 UTC (permalink / raw)
  To: Linus Walleij, Andy Shevchenko, Bartosz Golaszewski,
	Geert Uytterhoeven
  Cc: linux-gpio, linux-kernel, thomas.petazzoni, DanieleCleri,
	GaryWang, Thomas Richard

Create a dedicated function to add a GPIO desc in the forwarder. Instead of
passing an array of GPIO desc, now the GPIO desc are passed on by one to
the forwarder.

Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
---
 drivers/gpio/gpio-aggregator.c | 57 +++++++++++++++++++++++++++++-------------
 1 file changed, 40 insertions(+), 17 deletions(-)

diff --git a/drivers/gpio/gpio-aggregator.c b/drivers/gpio/gpio-aggregator.c
index a5e3ae4d8813..4d6e41e02659 100644
--- a/drivers/gpio/gpio-aggregator.c
+++ b/drivers/gpio/gpio-aggregator.c
@@ -510,6 +510,10 @@ devm_gpiochip_fwd_alloc(struct device *dev, unsigned int ngpios)
 	if (!fwd)
 		return ERR_PTR(-ENOMEM);
 
+	fwd->descs = devm_kcalloc(dev, ngpios, sizeof(*fwd->descs), GFP_KERNEL);
+	if (!fwd->descs)
+		return ERR_PTR(-ENOMEM);
+
 	chip = &fwd->chip;
 
 	chip->label = label;
@@ -529,6 +533,39 @@ devm_gpiochip_fwd_alloc(struct device *dev, unsigned int ngpios)
 	return fwd;
 }
 
+static int gpiochip_fwd_add_gpio_desc(struct gpiochip_fwd *fwd,
+				      struct gpio_desc *desc,
+				      unsigned int offset)
+{
+	struct gpio_chip *parent = gpiod_to_chip(desc);
+	struct gpio_chip *chip = &fwd->chip;
+
+	if (offset > chip->ngpio)
+		return -EINVAL;
+
+	if (fwd->descs[offset])
+		return -EEXIST;
+
+	/*
+	 * If any of the GPIO lines are sleeping, then the entire forwarder
+	 * will be sleeping.
+	 * If any of the chips support .set_config(), then the forwarder will
+	 * support setting configs.
+	 */
+	if (gpiod_cansleep(desc))
+		chip->can_sleep = true;
+
+	if (parent && parent->set_config)
+		chip->set_config = gpio_fwd_set_config;
+
+	fwd->descs[offset] = desc;
+
+	dev_dbg(chip->parent, "%u => gpio %d irq %d\n", offset,
+		desc_to_gpio(desc), gpiod_to_irq(desc));
+
+	return 0;
+}
+
 /**
  * gpiochip_fwd_create() - Create a new GPIO forwarder
  * @dev: Parent device pointer
@@ -560,26 +597,12 @@ static struct gpiochip_fwd *gpiochip_fwd_create(struct device *dev,
 
 	chip = &fwd->chip;
 
-	/*
-	 * If any of the GPIO lines are sleeping, then the entire forwarder
-	 * will be sleeping.
-	 * If any of the chips support .set_config(), then the forwarder will
-	 * support setting configs.
-	 */
 	for (i = 0; i < ngpios; i++) {
-		struct gpio_chip *parent = gpiod_to_chip(descs[i]);
-
-		dev_dbg(dev, "%u => gpio %d irq %d\n", i,
-			desc_to_gpio(descs[i]), gpiod_to_irq(descs[i]));
-
-		if (gpiod_cansleep(descs[i]))
-			chip->can_sleep = true;
-		if (parent && parent->set_config)
-			chip->set_config = gpio_fwd_set_config;
+		error = gpiochip_fwd_add_gpio_desc(fwd, descs[i], i);
+		if (error)
+			return ERR_PTR(error);
 	}
 
-	fwd->descs = descs;
-
 	if (chip->can_sleep)
 		mutex_init(&fwd->mlock);
 	else

-- 
2.39.5


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v3 05/10] gpio: aggregator: refactor the forwarder registration part
  2025-04-16 13:59 [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA Thomas Richard
                   ` (3 preceding siblings ...)
  2025-04-16 13:59 ` [PATCH v3 04/10] gpio: aggregator: refactor the code to add GPIO desc in the forwarder Thomas Richard
@ 2025-04-16 13:59 ` Thomas Richard
  2025-04-16 14:11 ` [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA Thomas Richard
  2025-04-17  7:53 ` Linus Walleij
  6 siblings, 0 replies; 12+ messages in thread
From: Thomas Richard @ 2025-04-16 13:59 UTC (permalink / raw)
  To: Linus Walleij, Andy Shevchenko, Bartosz Golaszewski,
	Geert Uytterhoeven
  Cc: linux-gpio, linux-kernel, thomas.petazzoni, DanieleCleri,
	GaryWang, Thomas Richard

Add a new function gpiochip_fwd_register(), which finalizes the
initialization of the forwarder and registers the corresponding gpiochip.

Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
---
 drivers/gpio/gpio-aggregator.c | 22 ++++++++++++++++------
 1 file changed, 16 insertions(+), 6 deletions(-)

diff --git a/drivers/gpio/gpio-aggregator.c b/drivers/gpio/gpio-aggregator.c
index 4d6e41e02659..66ea3daafc03 100644
--- a/drivers/gpio/gpio-aggregator.c
+++ b/drivers/gpio/gpio-aggregator.c
@@ -566,6 +566,21 @@ static int gpiochip_fwd_add_gpio_desc(struct gpiochip_fwd *fwd,
 	return 0;
 }
 
+static int gpiochip_fwd_register(struct gpiochip_fwd *fwd)
+{
+	struct gpio_chip *chip = &fwd->chip;
+	int error;
+
+	if (chip->can_sleep)
+		mutex_init(&fwd->mlock);
+	else
+		spin_lock_init(&fwd->slock);
+
+	error = devm_gpiochip_add_data(chip->parent, chip, fwd);
+
+	return error;
+}
+
 /**
  * gpiochip_fwd_create() - Create a new GPIO forwarder
  * @dev: Parent device pointer
@@ -603,18 +618,13 @@ static struct gpiochip_fwd *gpiochip_fwd_create(struct device *dev,
 			return ERR_PTR(error);
 	}
 
-	if (chip->can_sleep)
-		mutex_init(&fwd->mlock);
-	else
-		spin_lock_init(&fwd->slock);
-
 	if (features & FWD_FEATURE_DELAY) {
 		error = gpiochip_fwd_setup_delay_line(dev, chip, fwd);
 		if (error)
 			return ERR_PTR(error);
 	}
 
-	error = devm_gpiochip_add_data(dev, chip, fwd);
+	error = gpiochip_fwd_register(fwd);
 	if (error)
 		return ERR_PTR(error);
 

-- 
2.39.5


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA
@ 2025-04-16 14:08 Thomas Richard
  2025-04-17 18:02 ` Andy Shevchenko
  0 siblings, 1 reply; 12+ messages in thread
From: Thomas Richard @ 2025-04-16 14:08 UTC (permalink / raw)
  To: Linus Walleij, Andy Shevchenko, Bartosz Golaszewski,
	Geert Uytterhoeven
  Cc: linux-gpio, linux-kernel, thomas.petazzoni, DanieleCleri,
	GaryWang, Thomas Richard

This is the third version of this series (rebased on v6.15-rc2).

The gpiolib part has been reworked, the gpiochip_add_pin_range() was
renamed to gpiochip_add_pin_range_with_pins() and a new pins parameter was
addded. Two stubs were created to add consecutive or sparse pin range.

For the forwarder library, a namespace was added and patches were splitted
to more simpler changes.

In the pinctrl core, the function devm_pinctrl_register_mappings() was
created.

No big changes in the upboard pinctrl driver, only few fixes and
improvements.

Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
---
Changes in v3:
- pinctrl: add devm_pinctrl_register_mappings()
- gpiolib: rename gpiochip_add_pin_range() to
  gpiochip_add_pin_range_with_pins() and add pins parameter
- gpiolib: add stubs gpiochip_add_pin_range() and 
  gpiochip_add_sparse_pin_range()
- aggregator: split to more simpler patches
- aggregator: add a namespace for the forwarder library
- aggregator: rename header file to forwarder.h
- aggregator: add some missing headers and declaration in forwarder.h
- aggregator: forwarder.h provides consumer.h and driver.h
- aggregator: fix error code returned by gpio_fwd_request()
- pinctrl-upboard: fix order of header files
- pinctrl-upboard: fix some nitpicks
- pinctrl-upboard: rework macros to define pin groups
- pinctrl-upboard: add missing container_of.h and err.h header files
- pinctrl-upboard: handle correctly pointer returned by dmi_first_match()
- pinctrl-upboard: use devm_pinctrl_register_mappings()
- pinctrl-upboard: import GPIO_FORWARDER namespace
- Link to v2: https://lore.kernel.org/r/20250317-aaeon-up-board-pinctrl-support-v2-0-36126e30aa62@bootlin.com

Changes in v2:
- mfd: removed driver (already merged)
- led: removed driver (already merged)
- gpio-aggregator: refactor code to create a gpio-fwd library
- pinctrl: refactor gpio part to use the gpio-fwd library
- pinctrl: add pinctrl mappings for each board

---
Thomas Richard (10):
      gpiolib: add support to register sparse pin range
      pinctrl: core: add devm_pinctrl_register_mappings()
      gpio: aggregator: move GPIO forwarder allocation in a dedicated function
      gpio: aggregator: refactor the code to add GPIO desc in the forwarder
      gpio: aggregator: refactor the forwarder registration part
      gpio: aggregator: update gpiochip_fwd_setup_delay_line() parameters
      gpio: aggregator: export symbols of the GPIO forwarder library
      gpio: aggregator: handle runtime registration of gpio_desc in gpiochip_fwd
      gpio: aggregator: add possibility to attach data to the forwarder
      pinctrl: Add pin controller driver for AAEON UP boards

 drivers/gpio/gpio-aggregator.c    |  221 +++++---
 drivers/gpio/gpiolib.c            |   29 +-
 drivers/pinctrl/Kconfig           |   18 +
 drivers/pinctrl/Makefile          |    1 +
 drivers/pinctrl/core.c            |   37 ++
 drivers/pinctrl/pinctrl-upboard.c | 1071 +++++++++++++++++++++++++++++++++++++
 include/linux/gpio/driver.h       |   51 +-
 include/linux/gpio/forwarder.h    |   63 +++
 include/linux/pinctrl/machine.h   |   10 +
 9 files changed, 1408 insertions(+), 93 deletions(-)
---
base-commit: 8a834b0ac9ceb354a6e0b8cf5b363edca8221bdd
change-id: 20240930-aaeon-up-board-pinctrl-support-98fa4a030490

Best regards,
-- 
Thomas Richard <thomas.richard@bootlin.com>


^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA
  2025-04-16 13:59 [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA Thomas Richard
                   ` (4 preceding siblings ...)
  2025-04-16 13:59 ` [PATCH v3 05/10] gpio: aggregator: refactor the forwarder registration part Thomas Richard
@ 2025-04-16 14:11 ` Thomas Richard
  2025-04-17  7:53 ` Linus Walleij
  6 siblings, 0 replies; 12+ messages in thread
From: Thomas Richard @ 2025-04-16 14:11 UTC (permalink / raw)
  To: Linus Walleij, Andy Shevchenko, Bartosz Golaszewski,
	Geert Uytterhoeven
  Cc: linux-gpio, linux-kernel, thomas.petazzoni, DanieleCleri,
	GaryWang

On 4/16/25 15:59, Thomas Richard wrote:
> This is the third version of this series (rebased on v6.15-rc2).
> 
> The gpiolib part has been reworked, the gpiochip_add_pin_range() was
> renamed to gpiochip_add_pin_range_with_pins() and a new pins parameter was
> addded. Two stubs were created to add consecutive or sparse pin range.
> 
> For the forwarder library, a namespace was added and patches were splitted
> to more simpler changes.
> 
> In the pinctrl core, the function devm_pinctrl_register_mappings() was
> created.
> 
> No big changes in the upboard pinctrl driver, only few fixes and
> improvements.

Hi,

Please do not use this thread, some patches are missing (b4 failed to
send all patches). Use this one:

https://lore.kernel.org/all/20250416-aaeon-up-board-pinctrl-support-v3-0-f40776bd06ee@bootlin.com/

Best Regards,

Thomas

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v3 01/10] gpiolib: add support to register sparse pin range
  2025-04-16 13:59 ` [PATCH v3 01/10] gpiolib: add support to register sparse pin range Thomas Richard
@ 2025-04-17  7:51   ` Linus Walleij
  0 siblings, 0 replies; 12+ messages in thread
From: Linus Walleij @ 2025-04-17  7:51 UTC (permalink / raw)
  To: Thomas Richard
  Cc: Andy Shevchenko, Bartosz Golaszewski, Geert Uytterhoeven,
	linux-gpio, linux-kernel, thomas.petazzoni, DanieleCleri,
	GaryWang

On Wed, Apr 16, 2025 at 4:00 PM Thomas Richard
<thomas.richard@bootlin.com> wrote:

> Add support to register for GPIO<->pin mapping using a list of non
> consecutive pins. The core already support sparse pin range (pins member
> of struct pinctrl_gpio_range), but it was not possible to register one. If
> pins is not NULL the core uses it, otherwise it assumes that a consecutive
> pin range was registered and it uses pin_base.
>
> The function gpiochip_add_pin_range() which allocates and fill the struct
> pinctrl_gpio_range was renamed to gpiochip_add_pin_range_with_pins() and
> the pins parameter was added.
>
> Two new functions were added, gpiochip_add_pin_range() and
> gpiochip_add_sparse_pin_range() to register a consecutive or sparse pins
> range. Both use gpiochip_add_pin_range_with_pins().
>
> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>

This looks correct, useful API and nice naming too!
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v3 02/10] pinctrl: core: add devm_pinctrl_register_mappings()
  2025-04-16 13:59 ` [PATCH v3 02/10] pinctrl: core: add devm_pinctrl_register_mappings() Thomas Richard
@ 2025-04-17  7:52   ` Linus Walleij
  0 siblings, 0 replies; 12+ messages in thread
From: Linus Walleij @ 2025-04-17  7:52 UTC (permalink / raw)
  To: Thomas Richard
  Cc: Andy Shevchenko, Bartosz Golaszewski, Geert Uytterhoeven,
	linux-gpio, linux-kernel, thomas.petazzoni, DanieleCleri,
	GaryWang

On Wed, Apr 16, 2025 at 4:00 PM Thomas Richard
<thomas.richard@bootlin.com> wrote:

> Using devm_pinctrl_register_mappings(), the core can automatically
> unregister pinctrl mappings.
>
> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>

This is useful and good!
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA
  2025-04-16 13:59 [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA Thomas Richard
                   ` (5 preceding siblings ...)
  2025-04-16 14:11 ` [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA Thomas Richard
@ 2025-04-17  7:53 ` Linus Walleij
  6 siblings, 0 replies; 12+ messages in thread
From: Linus Walleij @ 2025-04-17  7:53 UTC (permalink / raw)
  To: Thomas Richard
  Cc: Andy Shevchenko, Bartosz Golaszewski, Geert Uytterhoeven,
	linux-gpio, linux-kernel, thomas.petazzoni, DanieleCleri,
	GaryWang

On Wed, Apr 16, 2025 at 4:00 PM Thomas Richard
<thomas.richard@bootlin.com> wrote:

> This is the third version of this series (rebased on v6.15-rc2).
>
> The gpiolib part has been reworked, the gpiochip_add_pin_range() was
> renamed to gpiochip_add_pin_range_with_pins() and a new pins parameter was
> addded. Two stubs were created to add consecutive or sparse pin range.
>
> For the forwarder library, a namespace was added and patches were splitted
> to more simpler changes.
>
> In the pinctrl core, the function devm_pinctrl_register_mappings() was
> created.
>
> No big changes in the upboard pinctrl driver, only few fixes and
> improvements.
>
> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>

From a pin control view this looks fine, I expect the whole thing
to be merged into the GPIO tree, so I'll just ACK the pinctrl
patches.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA
  2025-04-16 14:08 Thomas Richard
@ 2025-04-17 18:02 ` Andy Shevchenko
  0 siblings, 0 replies; 12+ messages in thread
From: Andy Shevchenko @ 2025-04-17 18:02 UTC (permalink / raw)
  To: Thomas Richard
  Cc: Linus Walleij, Bartosz Golaszewski, Geert Uytterhoeven,
	linux-gpio, linux-kernel, thomas.petazzoni, DanieleCleri,
	GaryWang

On Wed, Apr 16, 2025 at 04:08:08PM +0200, Thomas Richard wrote:
> This is the third version of this series (rebased on v6.15-rc2).
> 
> The gpiolib part has been reworked, the gpiochip_add_pin_range() was
> renamed to gpiochip_add_pin_range_with_pins() and a new pins parameter was
> addded. Two stubs were created to add consecutive or sparse pin range.
> 
> For the forwarder library, a namespace was added and patches were splitted
> to more simpler changes.
> 
> In the pinctrl core, the function devm_pinctrl_register_mappings() was
> created.
> 
> No big changes in the upboard pinctrl driver, only few fixes and
> improvements.

I reviewed it and the whole impression is very good, it seems much better in
comparison to the previous one(s).

The biggest issue I see here is the exporting the forwarder internal data type.
Most of the rest is the style related comments. Looking forward for a new
version.

-- 
With Best Regards,
Andy Shevchenko



^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2025-04-17 18:02 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-04-16 13:59 [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA Thomas Richard
2025-04-16 13:59 ` [PATCH v3 01/10] gpiolib: add support to register sparse pin range Thomas Richard
2025-04-17  7:51   ` Linus Walleij
2025-04-16 13:59 ` [PATCH v3 02/10] pinctrl: core: add devm_pinctrl_register_mappings() Thomas Richard
2025-04-17  7:52   ` Linus Walleij
2025-04-16 13:59 ` [PATCH v3 03/10] gpio: aggregator: move GPIO forwarder allocation in a dedicated function Thomas Richard
2025-04-16 13:59 ` [PATCH v3 04/10] gpio: aggregator: refactor the code to add GPIO desc in the forwarder Thomas Richard
2025-04-16 13:59 ` [PATCH v3 05/10] gpio: aggregator: refactor the forwarder registration part Thomas Richard
2025-04-16 14:11 ` [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA Thomas Richard
2025-04-17  7:53 ` Linus Walleij
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2025-04-16 14:08 Thomas Richard
2025-04-17 18:02 ` Andy Shevchenko

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