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From: Dave Hansen <dave.hansen@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Chang S. Bae" <chang.seok.bae@intel.com>,
	seanjc@google.com, kvm@vger.kernel.org, x86@kernel.org,
	linux-kernel@vger.kernel.org, chao.gao@intel.com
Subject: Re: [PATCH v4 06/21] x86/fpu: Ignore APX when copying from/to guest FPU
Date: Thu, 14 May 2026 10:17:46 -0700	[thread overview]
Message-ID: <eacff6d2-50eb-4ac1-93cf-f5652651df70@intel.com> (raw)
In-Reply-To: <CABgObfZmFLDZPLEeLW5=yk8oyO8ibXr48JSVXaF7cKfz2SQw4A@mail.gmail.com>

On 5/14/26 09:04, Paolo Bonzini wrote:
...
>> Couldn't we, for instance, just let the APX registers use the "fpu"
>> ABIs? PKRU is weird too, but it still gets to use those ABIs.
> 
> For PKRU it makes sense because it is not kept in the FPU even for the
> non-guest case. This is not the case for EGPRs, but I guess it would
> be the same if the kernel was compiled with APX? If the kernel entry
> code would have to stash r16-r31 from userspace before entering C
> code, then we can add similar "unsigned long *egprs" arguments to
> copy_uabi_from_kernel_to_xstate, copy_uabi_to_xstate, and likewise in
> the other direction.

I think we're getting into the weeds a bit. Maybe we should focus on how
this affects the ABIs and work in from there. Like you mentioned, we
might or might not have kernel APX support and the ABI should make sense
no matter what we do inside the kernel.

The functions we're discussing for this patch are:

	fpu_copy_uabi_to_guest_fpstate()
	fpu_copy_guest_fpstate_to_uabi()

which implement the meat of the functionality of these IOCTLs:

	KVM_SET_XSAVE
	KVM_GET_XSAVE

So the question, visible to userspace, is whether the
KVM_{GET,SET}_XSAVE should APIs should be able to manage XFEATURE_APX
data or not. If we decide *not* to manage them there, there needs to be
a _separate_ ABI.

Are we on the same page so far?

If we _just_ look at making a good, consistent ABI, I don't think
XFEATURE_APX is special. The registers can be managed by XSAVE. There's
a KVM XSAVE ABI. Why would *this* feature be special from all of the others?

I don't think the fact that the kernel is using those registers as GPRs
changes what makes a good ABI. That's a kernel-internal implementation
detail.

Now, that's not to say we should ignore kernel complexity. Maybe making
a nice ABI is so nasty to the kernel internals that we shouldn't bother.
I _think_ that's what you're suggesting.

Is that right?

  reply	other threads:[~2026-05-14 17:17 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-12  1:14 [PATCH v4 00/21] KVM: x86: Enable APX for guests Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 01/21] KVM: VMX: Macrofy GPR swapping in __vmx_vcpu_run() Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 02/21] KVM: SVM: Macrofy GPR swapping in __svm_vcpu_run() Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 03/21] KVM: SEV: Macrofy GPR swapping in __svm_sev_es_vcpu_run() Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 04/21] KVM: x86: Extend VCPU registers for EGPRs Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 05/21] KVM: VMX: Save guest EGPRs in VCPU cache Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 06/21] x86/fpu: Ignore APX when copying from/to guest FPU Chang S. Bae
2026-05-13 17:42   ` Paolo Bonzini
2026-05-13 19:10   ` Dave Hansen
2026-05-14 16:04     ` Paolo Bonzini
2026-05-14 17:17       ` Dave Hansen [this message]
2026-05-14 17:33         ` Paolo Bonzini
2026-05-15  2:04       ` Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 07/21] KVM: x86: Support APX state for XSAVE ABI Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 08/21] KVM: VMX: Refactor VMX instruction information access Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 09/21] KVM: VMX: Refactor instruction information decoding Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 10/21] KVM: VMX: Refactor register index retrieval from exit qualification Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 11/21] KVM: VMX: Support instruction information extension Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 12/21] KVM: nVMX: Propagate the extended instruction info field Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 13/21] KVM: x86: Support EGPR accessing and tracking for emulator Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 14/21] KVM: x86: Handle EGPR index and REX2-incompatible opcodes Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 15/21] KVM: x86: Support REX2-prefixed opcode decode Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 16/21] KVM: x86: Reject EVEX-prefixed instructions Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 17/21] KVM: x86: Guard valid XCR0.APX settings Chang S. Bae
2026-05-12  1:14 ` [PATCH v4 18/21] KVM: x86: Expose APX foundation feature to guests Chang S. Bae
2026-05-12  1:15 ` [PATCH v4 19/21] KVM: x86: Expose APX sub-features " Chang S. Bae
2026-05-12  1:15 ` [PATCH v4 20/21] KVM: x86: selftests: Add APX state and ABI test Chang S. Bae
2026-05-12  1:15 ` [PATCH v4 21/21] KVM: x86: selftests: Add APX state handling and XCR0 sanity checks Chang S. Bae
2026-05-13 17:52 ` [PATCH v4 00/21] KVM: x86: Enable APX for guests Paolo Bonzini

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