From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: "Daniel Golle" <daniel@makrotopia.org>,
linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
"Thierry Reding" <thierry.reding@gmail.com>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Matthias Brugger" <matthias.bgg@gmail.com>
Cc: Fabien Parent <fparent@baylibre.com>,
Zhi Mao <zhi.mao@mediatek.com>, Sam Shih <sam.shih@mediatek.com>
Subject: Re: [PATCH] pwm: mediatek: always use bus clock for PWM on MT7622
Date: Fri, 28 Oct 2022 10:39:31 +0200 [thread overview]
Message-ID: <eb47aba9-e5d9-9f27-06ae-cf386b291b05@collabora.com> (raw)
In-Reply-To: <Y1iF2slvSblf6bYK@makrotopia.org>
Il 26/10/22 02:56, Daniel Golle ha scritto:
> According to MT7622 Reference Manual for Development Board v1.0 the PWM
> unit found in the MT7622 SoC also comes with the PWM_CK_26M_SEL register
> at offset 0x210 just like other modern MediaTek ARM64 SoCs.
> And also MT7622 sets that register to 0x00000001 on reset which is
> described as 'Select 26M fix CLK as BCLK' in the datasheet.
> Hence set has_ck_26m_sel to true also for MT7622 which results in the
> driver writing 0 to the PWM_CK_26M_SEL register which is described as
> 'Select bus CLK as BCLK'.
>
> Fixes: 0c0ead76235db0 ("pwm: mediatek: Always use bus clock")
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
next prev parent reply other threads:[~2022-10-28 8:39 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-26 0:56 [PATCH] pwm: mediatek: always use bus clock for PWM on MT7622 Daniel Golle
2022-10-28 8:39 ` AngeloGioacchino Del Regno [this message]
2022-11-17 11:57 ` Uwe Kleine-König
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