From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: Ravi Bangoria <ravi.bangoria@amd.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>,
James Clark <james.clark@linaro.org>,
x86@kernel.org, linux-perf-users@vger.kernel.org,
linux-kernel@vger.kernel.org,
Manali Shukla <manali.shukla@amd.com>,
Santosh Shukla <santosh.shukla@amd.com>,
Ananth Narayan <ananth.narayan@amd.com>,
Sandipan Das <sandipan.das@amd.com>
Subject: Re: [PATCH 10/11] perf/amd/ibs: Enable streaming store filter
Date: Mon, 19 Jan 2026 15:57:45 +0800 [thread overview]
Message-ID: <ebc19c7f-191e-4e94-bc58-6f431ad5fff6@linux.intel.com> (raw)
In-Reply-To: <20260116033450.965-11-ravi.bangoria@amd.com>
On 1/16/2026 11:34 AM, Ravi Bangoria wrote:
> IBS OP on future hardware supports recording samples only for instructions
> that does streaming store. Like the existing IBS filters, samples pointing
> to instruction which does not cause streaming store are discarded and IBS
> restarts internally.
>
> Example:
>
> $ perf record -e ibs_op/strmst=1/ -- <workload>
>
> Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
> ---
> arch/x86/events/amd/ibs.c | 50 ++++++++++++++++++++++++++++++++++
> arch/x86/include/asm/amd/ibs.h | 3 +-
> 2 files changed, 52 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
> index a768a82d7ad2..0331bcd82272 100644
> --- a/arch/x86/events/amd/ibs.c
> +++ b/arch/x86/events/amd/ibs.c
> @@ -34,6 +34,7 @@ static u32 ibs_caps;
>
> /* attr.config1 */
> #define IBS_OP_CONFIG1_LDLAT_MASK (0xFFFULL << 0)
> +#define IBS_OP_CONFIG1_STRMST_MASK ( 1ULL << 12)
>
> #define IBS_FETCH_CONFIG1_FETCHLAT_MASK (0x7FFULL << 0)
>
> @@ -292,6 +293,14 @@ static bool perf_ibs_fetch_lat_event(struct perf_ibs *perf_ibs,
> (event->attr.config1 & IBS_FETCH_CONFIG1_FETCHLAT_MASK);
> }
>
> +static bool perf_ibs_strmst_event(struct perf_ibs *perf_ibs,
> + struct perf_event *event)
> +{
> + return perf_ibs == &perf_ibs_op &&
> + (ibs_caps & IBS_CAPS_STRMST_RMTSOCKET) &&
> + (event->attr.config1 & IBS_OP_CONFIG1_STRMST_MASK);
> +}
> +
> static int perf_ibs_init(struct perf_event *event)
> {
> struct hw_perf_event *hwc = &event->hw;
> @@ -416,6 +425,15 @@ static int perf_ibs_init(struct perf_event *event)
> hwc->extra_reg.config |= fetchlat << 1;
> }
>
> + if (perf_ibs_strmst_event(perf_ibs, event)) {
> + u64 strmst = event->attr.config1 & IBS_OP_CONFIG1_STRMST_MASK;
> +
> + strmst >>= 12;
The right shift can be directly merged into previous sentence, and better
define some macro instead of use these magic numbers.
> +
> + hwc->extra_reg.reg = perf_ibs->msr2;
> + hwc->extra_reg.config |= strmst << 3;
> + }
> +
> /*
> * If we modify hwc->sample_period, we also need to update
> * hwc->last_period and hwc->period_left.
> @@ -706,6 +724,8 @@ PMU_EVENT_ATTR_STRING(ldlat, ibs_op_ldlat_cap, "1");
> PMU_EVENT_ATTR_STRING(dtlb_pgsize, ibs_op_dtlb_pgsize_cap, "1");
> PMU_EVENT_ATTR_STRING(fetchlat, ibs_fetch_lat_format, "config1:0-10");
> PMU_EVENT_ATTR_STRING(fetchlat, ibs_fetch_lat_cap, "1");
> +PMU_EVENT_ATTR_STRING(strmst, ibs_op_strmst_format, "config1:12");
> +PMU_EVENT_ATTR_STRING(strmst, ibs_op_strmst_cap, "1");
>
> static umode_t
> zen4_ibs_extensions_is_visible(struct kobject *kobj, struct attribute *attr, int i)
> @@ -719,6 +739,12 @@ ibs_fetch_lat_is_visible(struct kobject *kobj, struct attribute *attr, int i)
> return ibs_caps & IBS_CAPS_FETCHLAT ? attr->mode : 0;
> }
>
> +static umode_t
> +ibs_op_strmst_is_visible(struct kobject *kobj, struct attribute *attr, int i)
> +{
> + return ibs_caps & IBS_CAPS_STRMST_RMTSOCKET ? attr->mode : 0;
> +}
> +
> static umode_t
> ibs_op_ldlat_is_visible(struct kobject *kobj, struct attribute *attr, int i)
> {
> @@ -767,6 +793,11 @@ static struct attribute *ibs_op_dtlb_pgsize_cap_attrs[] = {
> NULL,
> };
>
> +static struct attribute *ibs_op_strmst_cap_attrs[] = {
> + &ibs_op_strmst_cap.attr.attr,
> + NULL,
> +};
> +
> static struct attribute_group group_fetch_formats = {
> .name = "format",
> .attrs = fetch_attrs,
> @@ -808,6 +839,12 @@ static struct attribute_group group_ibs_op_dtlb_pgsize_cap = {
> .is_visible = ibs_op_dtlb_pgsize_is_visible,
> };
>
> +static struct attribute_group group_ibs_op_strmst_cap = {
> + .name = "caps",
> + .attrs = ibs_op_strmst_cap_attrs,
> + .is_visible = ibs_op_strmst_is_visible,
> +};
> +
> static const struct attribute_group *fetch_attr_groups[] = {
> &group_fetch_formats,
> &empty_caps_group,
> @@ -853,6 +890,11 @@ static struct attribute *ibs_op_ldlat_format_attrs[] = {
> NULL,
> };
>
> +static struct attribute *ibs_op_strmst_format_attrs[] = {
> + &ibs_op_strmst_format.attr.attr,
> + NULL,
> +};
> +
> static struct attribute_group group_cnt_ctl = {
> .name = "format",
> .attrs = cnt_ctl_attrs,
> @@ -877,6 +919,12 @@ static struct attribute_group group_ibs_op_ldlat_format = {
> .is_visible = ibs_op_ldlat_is_visible,
> };
>
> +static struct attribute_group group_ibs_op_strmst_format = {
> + .name = "format",
> + .attrs = ibs_op_strmst_format_attrs,
> + .is_visible = ibs_op_strmst_is_visible,
> +};
> +
> static const struct attribute_group *op_attr_update[] = {
> &group_cnt_ctl,
> &group_op_l3missonly,
> @@ -884,6 +932,8 @@ static const struct attribute_group *op_attr_update[] = {
> &group_ibs_op_ldlat_cap,
> &group_ibs_op_ldlat_format,
> &group_ibs_op_dtlb_pgsize_cap,
> + &group_ibs_op_strmst_cap,
> + &group_ibs_op_strmst_format,
> NULL,
> };
>
> diff --git a/arch/x86/include/asm/amd/ibs.h b/arch/x86/include/asm/amd/ibs.h
> index 3ee5903982c2..b940156b7d23 100644
> --- a/arch/x86/include/asm/amd/ibs.h
> +++ b/arch/x86/include/asm/amd/ibs.h
> @@ -99,7 +99,8 @@ union ibs_op_data2 {
> rmt_node:1, /* 4: destination node */
> cache_hit_st:1, /* 5: cache hit state */
> data_src_hi:2, /* 6-7: data source high */
> - reserved1:56; /* 8-63: reserved */
> + strm_st:1, /* 8: streaming store */
> + reserved1:55; /* 9-63: reserved */
> };
> };
>
next prev parent reply other threads:[~2026-01-19 7:57 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-16 3:34 [PATCH 00/11] perf/amd/ibs: Fixes + future enhancements Ravi Bangoria
2026-01-16 3:34 ` [PATCH 01/11] perf/amd/ibs: Throttle interrupts with filtered ldlat samples Ravi Bangoria
2026-01-19 7:31 ` Mi, Dapeng
2026-01-19 12:56 ` Ravi Bangoria
2026-01-16 3:34 ` [PATCH 02/11] perf/amd/ibs: Limit ldlat->l3missonly dependency to Zen5 Ravi Bangoria
2026-01-16 3:34 ` [PATCH 03/11] perf/amd/ibs: Preserve PhyAddrVal bit when clearing PhyAddr MSR Ravi Bangoria
2026-01-16 3:34 ` [PATCH 04/11] perf/amd/ibs: Avoid race between event add and NMI Ravi Bangoria
2026-01-16 3:34 ` [PATCH 05/11] perf/amd/ibs: Define macro for ldlat mask Ravi Bangoria
2026-01-19 7:38 ` Mi, Dapeng
2026-01-16 3:34 ` [PATCH 06/11] perf/amd/ibs: Add new MSRs and CPUID bits definitions Ravi Bangoria
2026-01-19 7:39 ` Mi, Dapeng
2026-01-16 3:34 ` [PATCH 07/11] perf/amd/ibs: Support IBS_{FETCH|OP}_CTL2[Dis] to eliminate RMW race Ravi Bangoria
2026-01-19 7:48 ` Mi, Dapeng
2026-01-19 13:00 ` Ravi Bangoria
2026-01-16 3:34 ` [PATCH 08/11] perf/amd/ibs: Enable fetch latency filtering Ravi Bangoria
2026-01-16 3:34 ` [PATCH 09/11] perf/amd/ibs: Enable RIP bit63 hardware filtering Ravi Bangoria
2026-01-16 3:34 ` [PATCH 10/11] perf/amd/ibs: Enable streaming store filter Ravi Bangoria
2026-01-19 7:57 ` Mi, Dapeng [this message]
2026-01-19 13:02 ` Ravi Bangoria
2026-01-16 3:34 ` [PATCH 11/11] perf/amd/ibs: Advertise remote socket capability Ravi Bangoria
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