* [PATCH 0/1] ixgbe: Correct BASE-BX10 compliance code
@ 2024-11-09 23:25 Tore Amundsen
2024-11-09 23:25 ` [PATCH 1/1] " Tore Amundsen
0 siblings, 1 reply; 6+ messages in thread
From: Tore Amundsen @ 2024-11-09 23:25 UTC (permalink / raw)
To: netdev
Cc: Tony Nguyen, Przemek Kitszel, Andrew Lunn, David S . Miller,
Eric Dumazet, Jakub Kicinski, Paolo Abeni, intel-wired-lan,
linux-kernel, Tore Amundsen
The current code in ixgbe_82599 checks the SFP Ethernet compliance code
against IXGBE_SFF_BASEBX10_CAPABLE to determine if an SFP module supports
1GB BASE-BX. According to SFF-8472 (section 5.4 Transceiver Compliance
Codes), the BASE-BX10 bit is defined as bit 6, which corresponds to a
value of 0x40 (binary 01000000).
However, the current value of IXGBE_SFF_BASEBX10_CAPABLE is 0x64 (binary
01100100), which incorrectly sets bits for 1000BASE-CX (bit 2) and
100BASE-FX (bit 5) in addition to BASE-BX10 (bit 6). This mix-up causes
the driver to incorrectly configure for BASE-BX when encountering
1000BASE-CX modules. Although 100BASE-FX does not pass the nominal
signaling rate check, this error could lead to future bugs if other
codes start to depend on the incorrect value of
IXGBE_SFF_BASEBX10_CAPABLE.
This patch corrects the value of IXGBE_SFF_BASEBX10_CAPABLE to 0x40.
Tore Amundsen (1):
ixgbe: Correct BASE-BX10 compliance code
drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--
2.43.0
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/1] ixgbe: Correct BASE-BX10 compliance code
2024-11-09 23:25 [PATCH 0/1] ixgbe: Correct BASE-BX10 compliance code Tore Amundsen
@ 2024-11-09 23:25 ` Tore Amundsen
2024-11-14 14:02 ` [Intel-wired-lan] " Paul Menzel
0 siblings, 1 reply; 6+ messages in thread
From: Tore Amundsen @ 2024-11-09 23:25 UTC (permalink / raw)
To: netdev
Cc: Tony Nguyen, Przemek Kitszel, Andrew Lunn, David S . Miller,
Eric Dumazet, Jakub Kicinski, Paolo Abeni, intel-wired-lan,
linux-kernel, Tore Amundsen
SFF-8472 (section 5.4 Transceiver Compliance Codes) defines bit 6 as
BASE-BX10. Bit 6 means a value of 0x40 (decimal 64).
The current value in the source code is 0x64, which appears to be a
mix-up of hex and decimal values. A value of 0x64 (binary 01100100)
incorrectly sets bit 2 (1000BASE-CX) and bit 5 (100BASE-FX) as well.
Signed-off-by: Tore Amundsen <tore@amundsen.org>
---
drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
index 14aa2ca51f70..81179c60af4e 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
@@ -40,7 +40,7 @@
#define IXGBE_SFF_1GBASESX_CAPABLE 0x1
#define IXGBE_SFF_1GBASELX_CAPABLE 0x2
#define IXGBE_SFF_1GBASET_CAPABLE 0x8
-#define IXGBE_SFF_BASEBX10_CAPABLE 0x64
+#define IXGBE_SFF_BASEBX10_CAPABLE 0x40
#define IXGBE_SFF_10GBASESR_CAPABLE 0x10
#define IXGBE_SFF_10GBASELR_CAPABLE 0x20
#define IXGBE_SFF_SOFT_RS_SELECT_MASK 0x8
--
2.43.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [Intel-wired-lan] [PATCH 1/1] ixgbe: Correct BASE-BX10 compliance code
2024-11-09 23:25 ` [PATCH 1/1] " Tore Amundsen
@ 2024-11-14 14:02 ` Paul Menzel
2024-11-14 19:50 ` [Intel-wired-lan] [PATCH v2 0/1] " Tore Amundsen
0 siblings, 1 reply; 6+ messages in thread
From: Paul Menzel @ 2024-11-14 14:02 UTC (permalink / raw)
To: Tore Amundsen
Cc: netdev, Tony Nguyen, Przemek Kitszel, Andrew Lunn,
David S . Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
intel-wired-lan, linux-kernel, Ernesto Castellotti
[Cc: +Ernesto]
Dear Tore,
Thank you for your patch.
Am 10.11.24 um 00:25 schrieb Tore Amundsen:
> SFF-8472 (section 5.4 Transceiver Compliance Codes) defines bit 6 as
> BASE-BX10. Bit 6 means a value of 0x40 (decimal 64).
>
> The current value in the source code is 0x64, which appears to be a
> mix-up of hex and decimal values. A value of 0x64 (binary 01100100)
> incorrectly sets bit 2 (1000BASE-CX) and bit 5 (100BASE-FX) as well.
>
> Signed-off-by: Tore Amundsen <tore@amundsen.org>
Could you add a Fixes: tag?
Fixes: 1b43e0d20f2d (ixgbe: Add 1000BASE-BX support)
> ---
> drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
> index 14aa2ca51f70..81179c60af4e 100644
> --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
> +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
> @@ -40,7 +40,7 @@
> #define IXGBE_SFF_1GBASESX_CAPABLE 0x1
> #define IXGBE_SFF_1GBASELX_CAPABLE 0x2
> #define IXGBE_SFF_1GBASET_CAPABLE 0x8
> -#define IXGBE_SFF_BASEBX10_CAPABLE 0x64
> +#define IXGBE_SFF_BASEBX10_CAPABLE 0x40
> #define IXGBE_SFF_10GBASESR_CAPABLE 0x10
> #define IXGBE_SFF_10GBASELR_CAPABLE 0x20
> #define IXGBE_SFF_SOFT_RS_SELECT_MASK 0x8
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Kind regards,
Paul
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-wired-lan] [PATCH v2 0/1] ixgbe: Correct BASE-BX10 compliance code
2024-11-14 14:02 ` [Intel-wired-lan] " Paul Menzel
@ 2024-11-14 19:50 ` Tore Amundsen
2024-11-14 19:50 ` [Intel-wired-lan] [PATCH v2 1/1] " Tore Amundsen
0 siblings, 1 reply; 6+ messages in thread
From: Tore Amundsen @ 2024-11-14 19:50 UTC (permalink / raw)
To: pmenzel
Cc: andrew+netdev, anthony.l.nguyen, davem, edumazet, ernesto,
intel-wired-lan, kuba, linux-kernel, netdev, pabeni,
przemyslaw.kitszel, tore
The current code in ixgbe_82599 checks the SFP Ethernet compliance code
against IXGBE_SFF_BASEBX10_CAPABLE to determine if an SFP module supports
1GB BASE-BX. According to SFF-8472 (section 5.4 Transceiver Compliance
Codes), the BASE-BX10 bit is defined as bit 6, which corresponds to a
value of 0x40 (binary 01000000).
However, the current value of IXGBE_SFF_BASEBX10_CAPABLE is 0x64 (binary
01100100), which incorrectly sets bits for 1000BASE-CX (bit 2) and
100BASE-FX (bit 5) in addition to BASE-BX10 (bit 6). This mix-up causes
the driver to incorrectly configure for BASE-BX when encountering
1000BASE-CX modules. Although 100BASE-FX does not pass the nominal
signaling rate check, this error could lead to future bugs if other
codes start to depend on the incorrect value of
IXGBE_SFF_BASEBX10_CAPABLE.
This patch corrects the value of IXGBE_SFF_BASEBX10_CAPABLE to 0x40.
Changelog for v2:
- Added Fixes tag as requested by Paul Menzel.
Tore Amundsen (1):
ixgbe: Correct BASE-BX10 compliance code
drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--
2.43.0
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-wired-lan] [PATCH v2 1/1] ixgbe: Correct BASE-BX10 compliance code
2024-11-14 19:50 ` [Intel-wired-lan] [PATCH v2 0/1] " Tore Amundsen
@ 2024-11-14 19:50 ` Tore Amundsen
2024-11-14 23:57 ` Erny
0 siblings, 1 reply; 6+ messages in thread
From: Tore Amundsen @ 2024-11-14 19:50 UTC (permalink / raw)
To: pmenzel
Cc: andrew+netdev, anthony.l.nguyen, davem, edumazet, ernesto,
intel-wired-lan, kuba, linux-kernel, netdev, pabeni,
przemyslaw.kitszel, tore
SFF-8472 (section 5.4 Transceiver Compliance Codes) defines bit 6 as
BASE-BX10. Bit 6 means a value of 0x40 (decimal 64).
The current value in the source code is 0x64, which appears to be a
mix-up of hex and decimal values. A value of 0x64 (binary 01100100)
incorrectly sets bit 2 (1000BASE-CX) and bit 5 (100BASE-FX) as well.
Fixes: 1b43e0d20f2d (ixgbe: Add 1000BASE-BX support)
Signed-off-by: Tore Amundsen <tore@amundsen.org>
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
---
drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
index 14aa2ca51f70..81179c60af4e 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
@@ -40,7 +40,7 @@
#define IXGBE_SFF_1GBASESX_CAPABLE 0x1
#define IXGBE_SFF_1GBASELX_CAPABLE 0x2
#define IXGBE_SFF_1GBASET_CAPABLE 0x8
-#define IXGBE_SFF_BASEBX10_CAPABLE 0x64
+#define IXGBE_SFF_BASEBX10_CAPABLE 0x40
#define IXGBE_SFF_10GBASESR_CAPABLE 0x10
#define IXGBE_SFF_10GBASELR_CAPABLE 0x20
#define IXGBE_SFF_SOFT_RS_SELECT_MASK 0x8
--
2.43.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [Intel-wired-lan] [PATCH v2 1/1] ixgbe: Correct BASE-BX10 compliance code
2024-11-14 19:50 ` [Intel-wired-lan] [PATCH v2 1/1] " Tore Amundsen
@ 2024-11-14 23:57 ` Erny
0 siblings, 0 replies; 6+ messages in thread
From: Erny @ 2024-11-14 23:57 UTC (permalink / raw)
To: Tore Amundsen
Cc: andrew+netdev, anthony.l.nguyen, davem, edumazet, ernesto,
intel-wired-lan, kuba, linux-kernel, netdev, pabeni, pmenzel,
przemyslaw.kitszel
On Thu, 2024-11-14 at 19:50 +0000, Tore Amundsen wrote:
> The current value in the source code is 0x64, which appears to be a
> mix-up of hex and decimal values. A value of 0x64 (binary 01100100)
> incorrectly sets bit 2 (1000BASE-CX) and bit 5 (100BASE-FX) as well.
> ---
> drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
> b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
> index 14aa2ca51f70..81179c60af4e 100644
> --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
> +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
> @@ -40,7 +40,7 @@
> #define IXGBE_SFF_1GBASESX_CAPABLE 0x1
> #define IXGBE_SFF_1GBASELX_CAPABLE 0x2
> #define IXGBE_SFF_1GBASET_CAPABLE 0x8
> -#define IXGBE_SFF_BASEBX10_CAPABLE 0x64
> +#define IXGBE_SFF_BASEBX10_CAPABLE 0x40
> #define IXGBE_SFF_10GBASESR_CAPABLE 0x10
> #define IXGBE_SFF_10GBASELR_CAPABLE 0x20
> #define IXGBE_SFF_SOFT_RS_SELECT_MASK 0x8
LGMT.
Acked-by: Ernesto Castellotti <ernesto@castellotti.net>
Kind regards,
Ernesto
^ permalink raw reply [flat|nested] 6+ messages in thread
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2024-11-09 23:25 [PATCH 0/1] ixgbe: Correct BASE-BX10 compliance code Tore Amundsen
2024-11-09 23:25 ` [PATCH 1/1] " Tore Amundsen
2024-11-14 14:02 ` [Intel-wired-lan] " Paul Menzel
2024-11-14 19:50 ` [Intel-wired-lan] [PATCH v2 0/1] " Tore Amundsen
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