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X-CSE-ConnectionGUID: 1bLSMVReRIWES6+KSewO9g== X-CSE-MsgGUID: XV4/hQ+LRMyA8eeOmcQy1w== X-IronPort-AV: E=McAfee;i="6700,10204,11309"; a="36318315" X-IronPort-AV: E=Sophos;i="6.12,299,1728975600"; d="scan'208";a="36318315" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 15:05:00 -0800 X-CSE-ConnectionGUID: Mr1+fHDdQyydzKaL32snHA== X-CSE-MsgGUID: ZZeshiqsRQWQU5YIPVgsAg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,299,1728975600"; d="scan'208";a="103748084" Received: from sramkris-mobl1.amr.corp.intel.com (HELO [10.124.221.181]) ([10.124.221.181]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 15:04:58 -0800 Message-ID: Date: Wed, 8 Jan 2025 15:04:59 -0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 1/1] x86/fred: Fix the FRED RSP0 MSR out of sync with its per CPU cache To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, andrew.cooper3@citrix.com References: <20250108023641.17396-1-xin@zytor.com> From: Dave Hansen Content-Language: en-US Autocrypt: addr=dave.hansen@intel.com; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 1/7/25 18:36, Xin Li (Intel) wrote: > The FRED RSP0 MSR (pointing to the top of the kernel stack for user > level event delivery) and its per CPU cache should be kept in sync to > avoid redundant writes in the exit to user space path, as a result, > a write to the FRED RSP0 MSR is paired with a write to its per CPU > cache as fred_update_rsp0() does. I _think_ you're trying to explain the general use of a per-cpu MSR cache. That's good. But I was reading this paragraph and thinking at this point that the bug had something to do with redundant writes to the MSR. How about this? The FRED RSP0 MSR is only used for delivering events when running userspace. This kernel leverages this property to reduce expensive MSR writes and optimize context switches. The kernel only writes the MSR when about to run userspace *and* when the MSR has actually changed since the last time userspace ran. This optimization is implemented by maintaining a per-cpu cache of FRED RSP0 and then checking that against the value for the current task's stack before running userspace. However cpu_init_fred_exceptions() writes the MSR without updating the per-cpu cache. This means that the kernel might return to userspace with MSR_IA32_FRED_RSP0==0 when it needed to point to the current task stack. This would induce a double fault (#DF), which is bad. A context switch after cpu_init_fred_exceptions() can paper over the issue since it updates the cached value. That evidently happens most of the time explaining how this bug got through.