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From: Florian Fainelli <florian.fainelli@broadcom.com>
To: Jim Quinlan <james.quinlan@broadcom.com>,
	linux-pci@vger.kernel.org,
	Nicolas Saenz Julienne <nsaenz@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Cyril Brulebois <kibi@debian.org>,
	Stanimir Varbanov <svarbanov@suse.de>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com
Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
	<linux-arm-kernel@lists.infradead.org>,
	open list <linux-kernel@vger.kernel.org>,
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
	<linux-rpi-kernel@lists.infradead.org>,
	Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v3 00/12] PCI: brcnstb: Enable STB 7712 SOC
Date: Sun, 14 Jul 2024 13:15:52 -0700	[thread overview]
Message-ID: <ed3265d4-e31b-46cc-bd15-553459f6a9d8@broadcom.com> (raw)
In-Reply-To: <20240710221630.29561-1-james.quinlan@broadcom.com>

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On 7/10/2024 3:16 PM, Jim Quinlan wrote:
> V3 Changes:
>    o Commit "Enable 7712 SOCs"
>      -- Move "model" check from outside to inside func (Stan)
>    o Commit "Check return value of all reset_control_xxx calls"
>      -- Propagate errors up the chain instead of ignoring them (Stan)
>    o Commit "Refactor for chips with many regular inbound BARs"
>      -- Nine suggestions given, nine implemented (Stan)
>    o Commit "Make HARD_DEBUG, INTR2_CPU_BASE offsets SoC-specific"
>      -- Drop tab, add parens around macro params in expression (Stan)
>    o Commit "Use swinit reset if available"
>      -- Treat swinit the same as other reset controllers (Stan)
>         Stan suggested to use dev_err_probe() for getting resources
>         but I will defer that to future series (if that's okay).
>    o Commit "Get resource before we start asserting resets"
>      -- Squash this with previous commit (Stan)
>    o Commit "Use "clk_out" error path label"
>      -- Move clk_prepare_enable() after getting resouurces (Stan)
>      -- Change subject to "Use more common error handling code in
>         brcm_pcie_probe()" (Markus)
>      -- Use imperative commit description (Markus)
>      -- "Fixes:" tag added for missing error return. (Markus)
>    o Commit "dt-bindings: PCI ..."
>      -- Split off maintainer change in separate commit.
>      -- Tried to accomodate Krzysztof's requests, I'm not sure I
>         have succeeded.  Krzysztof, please see [1] below.
>    
>    [1] Wrt the YAML of brcmstb PCIe resets, here is what I am trying
>        to describe:
> 
>        CHIP       NUM_RESETS    NAMES
>        ====       ==========    =====
>        4908       1             perst
>        7216       1             rescal
>        7712       3             rescal, bridge, swinit
>        Others     0             -
> 
> 
> V2 Changes (note: four new commits):
>    o Commit "dt-bindings: PCI ..."
>      -- s/Adds/Add/, fix spelling error (Bjorn)
>      -- Order compatible strings alphabetically (Krzysztof)
>      -- Give definitions first then rules (Krzysztof)
>      -- Add reason for change in maintainer (Krzysztof)
>    o Commit "Use swinit reset if available"
>      -- no need for "else" clause (Philipp)
>      -- fix improper use of dev_err_probe() (Philipp)
>    o Commit "Use "clk_out" error path label"
>      -- Improve commit message (Bjorn)
>    o Commit "PCI: brcmstb: Make HARD_DEBUG, INTR2_CPU_BASE offsets SoC-specific"
>      -- Improve commit subject line (Bjorn)
>    o Commit (NEW) -- Change field name from 'type' to 'model'
>      -- Added as requested (Stanimir)
>    o Commit (NEW) -- Check return value of all reset_control_xxx calls
>      -- Added as requested (Stanimir)
>    o Commit (NEW) "Get resource before we start asserting reset controllers"
>      -- Added as requested (Stanimir)
>    o Commit (NEW) -- "Remove two unused constants from driver"
> 
> 
> V1:
>    This submission is for the Broadcom STB 7712, sibling SOC of the RPi5 chip.
>    Stanimir has already submitted a patch "Add PCIe support for bcm2712" for
>    the RPi version of the SOC.  It is hoped that Stanimir will allow us to
>    submit this series first and subsequently rebase his patch(es).
> 
>    The largest commit, "Refactor for chips with many regular inbound BARs"
>    affects both the STB and RPi SOCs.  It allows for multiple inbound ranges
>    where previously only one was effectively used.  This feature will also
>    be present in future STB chips, as well as Broadcom's Cable Modem group.

Nit: the subject has a typo s/brcnstb/brcmstb/g, probably does not 
matter since the subject would not be included in the pull request anyway.
-- 
Florian

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  parent reply	other threads:[~2024-07-14 20:15 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-10 22:16 [PATCH v3 00/12] PCI: brcnstb: Enable STB 7712 SOC Jim Quinlan
2024-07-10 22:16 ` [PATCH v3 01/12] dt-bindings: PCI: Change brcmstb YAML maintainer Jim Quinlan
2024-07-11 21:24   ` Rob Herring (Arm)
2024-07-14 20:18   ` Florian Fainelli
2024-07-10 22:16 ` [PATCH v3 02/12] dt-bindings: PCI: Cleanup of brcmstb YAML and add 7712 SoC Jim Quinlan
2024-07-11  6:21   ` Krzysztof Kozlowski
2024-07-10 22:16 ` [PATCH v3 03/12] PCI: brcmstb: Use common error handling code in brcm_pcie_probe() Jim Quinlan
2024-07-15 10:32   ` Stanimir Varbanov
2024-07-15 21:10   ` Florian Fainelli
2024-07-10 22:16 ` [PATCH v3 04/12] PCI: brcmstb: Use bridge reset if available Jim Quinlan
2024-07-13 19:12   ` Amit Singh Tomar
2024-07-16 18:40     ` Jim Quinlan
2024-07-16 19:06       ` Amit Singh Tomar
2024-07-15 10:33   ` Stanimir Varbanov
2024-07-15 21:10   ` Florian Fainelli
2024-07-10 22:16 ` [PATCH v3 05/12] PCI: brcmstb: Use swinit " Jim Quinlan
2024-07-15 10:35   ` Stanimir Varbanov
2024-07-15 21:09   ` Florian Fainelli
2024-07-10 22:16 ` [PATCH v3 06/12] PCI: brcmstb: PCI: brcmstb: Make HARD_DEBUG, INTR2_CPU_BASE offsets SoC-specific Jim Quinlan
2024-07-15 10:36   ` Stanimir Varbanov
2024-07-15 21:09   ` Florian Fainelli
2024-07-10 22:16 ` [PATCH v3 07/12] PCI: brcmstb: Remove two unused constants from driver Jim Quinlan
2024-07-15 21:08   ` Florian Fainelli
2024-07-10 22:16 ` [PATCH v3 08/12] PCI: brcmstb: Don't conflate the reset rescal with phy ctrl Jim Quinlan
2024-07-15 21:08   ` Florian Fainelli
2024-07-10 22:16 ` [PATCH v3 09/12] PCI: brcmstb: Refactor for chips with many regular inbound BARs Jim Quinlan
2024-07-15 10:38   ` Stanimir Varbanov
2024-07-10 22:16 ` [PATCH v3 10/12] PCI: brcmstb: Check return value of all reset_control_xxx calls Jim Quinlan
2024-07-15 14:01   ` Stanimir Varbanov
2024-07-15 21:08   ` Florian Fainelli
2024-07-10 22:16 ` [PATCH v3 11/12] PCI: brcmstb: Change field name from 'type' to 'model' Jim Quinlan
2024-07-15 21:06   ` Florian Fainelli
2024-07-10 22:16 ` [PATCH v3 12/12] PCI: brcmstb: Enable 7712 SOCs Jim Quinlan
2024-07-15 21:12   ` Florian Fainelli
2024-07-14 20:15 ` Florian Fainelli [this message]
2024-07-15 17:24 ` [PATCH v3 00/12] PCI: brcnstb: Enable STB 7712 SOC Florian Fainelli

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