From: Dave Jiang <dave.jiang@intel.com>
To: Gregory Price <gourry@gourry.net>,
"Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>
Cc: linux-cxl@vger.kernel.org, Davidlohr Bueso <dave@stgolabs.net>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Corbet <corbet@lwn.net>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
Robert Richter <rrichter@amd.com>,
Cheatham Benjamin <benjamin.cheatham@amd.com>
Subject: Re: [PATCH 3/4 v5] cxl/core: Enable Region creation on x86 with LMH
Date: Tue, 7 Oct 2025 13:25:11 -0700 [thread overview]
Message-ID: <ed390a72-2470-4e09-8fbe-56915d619dfa@intel.com> (raw)
In-Reply-To: <aOQAb9H-wIxc6j31@gourry-fedora-PF4VCD3F>
On 10/6/25 10:46 AM, Gregory Price wrote:
> On Mon, Oct 06, 2025 at 05:58:06PM +0200, Fabio M. De Francesco wrote:
>> The CXL Fixed Memory Window Structure (CFMWS) describes zero or more
>> Host Physical Address (HPA) windows that are associated with each CXL
>> Host Bridge. Each window represents a contiguous HPA that may be
>> interleaved with one or more targets (CXL v3.2 - 9.18.1.3).
>>
> ...
>>
>> Cc: Alison Schofield <alison.schofield@intel.com>
>> Cc: Dan Williams <dan.j.williams@intel.com>
>> Cc: Dave Jiang <dave.jiang@intel.com>
>> Cc: Ira Weiny <ira.weiny@intel.com>
>> Signed-off-by: Fabio M. De Francesco <fabio.m.de.francesco@linux.intel.com>
>
> Couple inlines but just nits
>
> Reviewed-by: Gregory Price <gourry@gourry.net>
>
>> @@ -1770,6 +1778,7 @@ static int match_cxlsd_to_cxled_by_range(struct device *dev, const void *data)
>> {
>> const struct cxl_endpoint_decoder *cxled = data;
>> struct cxl_switch_decoder *cxlsd;
>> + struct cxl_root_decoder *cxlrd;
>> const struct range *r1, *r2;
>>
>> if (!is_switch_decoder(dev))
>> @@ -1779,8 +1788,13 @@ static int match_cxlsd_to_cxled_by_range(struct device *dev, const void *data)
>> r1 = &cxlsd->cxld.hpa_range;
>> r2 = &cxled->cxld.hpa_range;
>>
>> - if (is_root_decoder(dev))
>> - return range_contains(r1, r2);
>> + if (is_root_decoder(dev)) {
>> + if (range_contains(r1, r2))
>> + return 1;
>> + cxlrd = to_cxl_root_decoder(dev);
>> + if (platform_cxlrd_matches_cxled(cxlrd, cxled))
>> + return 1;
>> + }
>
> Is there any concern for longer term maintainability if addition
> match_*() functions are added? Or is this upkeep just the unfortunate
> maintenance cost of supportering the quirk?
Suggestions welcome. Would be nice if we have cleaner ways of dealing with this.
>
>>
>> static struct cxl_decoder *
>> @@ -3406,8 +3421,12 @@ static int match_region_to_cxled_by_range(struct device *dev, const void *data)
>> p = &cxlr->params;
>>
>> guard(rwsem_read)(&cxl_rwsem.region);
>> - if (p->res && p->res->start == r->start && p->res->end == r->end)
>> - return 1;
>> + if (p->res) {
>> + if (p->res->start == r->start && p->res->end == r->end)
>> + return 1;
>> + if (platform_region_matches_cxld(p, &cxled->cxld))
>> + return 1;
>> + }
>
>
> if (!p->res)
> return 0;
> if (p->res->start == r->start && p->res->end == r->end)
> return 1;
> if (platform_region_matches_cxld(p, &cxled->cxld))
> return 1;
> return 0;
>
> ?
>
> I like flat, but I also dislike not-logic. Style choice here, unless
> others have a strong feeling this is fine.
More flat is definitely the preferred way. With the changes, the last one we can actually do:
return platform_region_matches_cxld(p, &cxled->cxld));
>
> ~Gregory
next prev parent reply other threads:[~2025-10-07 20:25 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-06 15:58 [PATCH 0/4 v5] cxl/core: Enable Region creation/attach on x86 with LMH Fabio M. De Francesco
2025-10-06 15:58 ` [PATCH 1/4 v5] cxl/core: Change match_*_by_range() signatures Fabio M. De Francesco
2025-10-06 17:35 ` Gregory Price
2025-10-06 23:30 ` Dave Jiang
2025-10-06 15:58 ` [PATCH 2/4 v5] cxl/core: Add helpers to detect Low Memory Holes on x86 Fabio M. De Francesco
2025-10-06 17:40 ` Gregory Price
2025-10-07 0:00 ` Dave Jiang
2025-10-09 3:16 ` Alison Schofield
2025-11-05 18:02 ` Fabio M. De Francesco
2025-10-10 7:38 ` kernel test robot
2025-11-05 18:11 ` Fabio M. De Francesco
2025-10-10 14:49 ` kernel test robot
2025-11-05 18:20 ` Fabio M. De Francesco
2025-11-05 18:51 ` Dave Jiang
2025-10-28 15:58 ` Jonathan Cameron
2025-10-06 15:58 ` [PATCH 3/4 v5] cxl/core: Enable Region creation on x86 with LMH Fabio M. De Francesco
2025-10-06 17:46 ` Gregory Price
2025-10-07 20:25 ` Dave Jiang [this message]
2025-10-09 14:30 ` Gregory Price
2025-10-09 3:29 ` Alison Schofield
2025-10-06 15:58 ` [PATCH 4/4 v5] cxl/test: Simulate an x86 Low Memory Hole for tests Fabio M. De Francesco
2025-10-07 20:37 ` Dave Jiang
2025-10-09 3:34 ` Alison Schofield
2025-10-09 3:52 ` Alison Schofield
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