From: Marek Vasut <marek.vasut@gmail.com>
To: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>,
Cyrille Pitchen <cyrille.pitchen@atmel.com>,
David Woodhouse <dwmw2@infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
Boris Brezillon <boris.brezillon@free-electrons.com>,
Richard Weinberger <richard@nod.at>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v9] mtd: spi-nor: Add support for S3AN spi-nor devices
Date: Tue, 13 Dec 2016 08:53:03 +0100 [thread overview]
Message-ID: <edf9ac78-6431-0f51-3151-3f1195263d9a@gmail.com> (raw)
In-Reply-To: <20161202113144.17970-1-ricardo.ribalda@gmail.com>
On 12/02/2016 12:31 PM, Ricardo Ribalda Delgado wrote:
> Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep
> their configuration data and (optionally) some user data.
>
> The protocol of this flash follows most of the spi-nor standard. With
> the following differences:
>
> - Page size might not be a power of two.
> - The address calculation (default addressing mode).
> - The spi nor commands used.
>
> Protocol is described on Xilinx User Guide UG333
>
> Reviewed-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
> Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
> Cc: Brian Norris <computersforpeace@gmail.com>
> Cc: Marek Vasut <marek.vasut@gmail.com>
[...]
> +static int s3an_nor_scan(const struct flash_info *info, struct spi_nor *nor)
> +{
> + int ret;
> + u8 val;
> +
> + ret = nor->read_reg(nor, SPINOR_OP_XRDSR, &val, 1);
> + if (ret < 0) {
> + dev_err(nor->dev, "error %d reading XRDSR\n", (int) ret);
> + return ret;
> + }
> +
> + nor->erase_opcode = SPINOR_OP_XSE;
> + nor->program_opcode = SPINOR_OP_XPP;
> + nor->read_opcode = SPINOR_OP_READ;
> + nor->flags |= SNOR_F_NO_OP_CHIP_ERASE ;
NIT: You have an extra space before ; ^
> +
> + /*
> + * This flashes have a page size of 264 or 528 bytes (known as
> + * Default addressing mode). It can be changed to a more standard
> + * Power of two mode where the page size is 256/512. This comes
> + * with a price: there is 3% less of space, the data is corrupted
> + * and the page size cannot be changed back to default addressing
> + * mode.
> + *
> + * The current addressing mode can be read from the XRDSR register
> + * and should not be changed, because is a destructive operation.
> + */
> + if (val & XSR_PAGESIZE) {
> + /* Flash in Power of 2 mode */
> + nor->page_size = (nor->page_size == 264) ? 256 : 512;
> + nor->mtd.writebufsize = nor->page_size;
> + nor->mtd.size = 8 * nor->page_size * info->n_sectors;
> + nor->mtd.erasesize = 8 * nor->page_size;
> + } else {
> + /* Flash in Default addressing mode */
> + nor->flags |= SNOR_F_S3AN_ADDR_DEFAULT;
> + }
> +
> + return 0;
> +}
Looks great otherwise:
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
--
Best regards,
Marek Vasut
next prev parent reply other threads:[~2016-12-13 11:40 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-02 11:31 [PATCH v9] mtd: spi-nor: Add support for S3AN spi-nor devices Ricardo Ribalda Delgado
2016-12-12 16:20 ` Ricardo Ribalda Delgado
2016-12-13 7:53 ` Marek Vasut
2016-12-13 7:53 ` Marek Vasut [this message]
2016-12-13 16:30 ` Cyrille Pitchen
2017-01-18 15:46 ` Ricardo Ribalda Delgado
2017-01-18 15:56 ` Marek Vasut
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