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Thu, 17 Jul 2025 03:03:59 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 56H33w2i017033 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 17 Jul 2025 03:03:58 GMT Received: from [10.239.133.49] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 16 Jul 2025 20:03:55 -0700 Message-ID: Date: Thu, 17 Jul 2025 11:03:52 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 2/2] coresight: Add label sysfs node support To: Mike Leach CC: Leo Yan , Suzuki K Poulose , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mathieu Poirier , Bjorn Andersson , Konrad Dybcio , , , , , References: <20250703130453.4265-1-quic_jinlmao@quicinc.com> <20250703130453.4265-3-quic_jinlmao@quicinc.com> <20250703141905.GE1039028@e132581.arm.com> <0e7ae7d1-4877-4e8a-a0fb-0fda5cc03cf2@quicinc.com> Content-Language: en-US From: Jinlong Mao In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: L_YyO-VRz5U42y7Nvyj6bm9BrLvwwg2a X-Authority-Analysis: v=2.4 cv=RtXFLDmK c=1 sm=1 tr=0 ts=6878681f cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=VwQbUJbxAAAA:8 a=COk6AnOGAAAA:8 a=KKAkSRfTAAAA:8 a=aWtVbIlNkpBLB9TuODAA:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzE3MDAyNyBTYWx0ZWRfX6ZJOOEuStCmU AI7Q4nskWrxM/oQKaAOixiOMMk9zwsatd8TK2NvW4NkhzAGIKukar7/zufXQbmlwg0FJWPAO+HZ kPqe+7mbn9UMeW2tWG8XZxs9Y/0XpdUaoIsTsvEFKMK/Bo/epHVSWZU9p8NqbGgfADkRGyfGcrm cti7SAZRsviRlYV2v1xP+WFRSQEj7lo9yZ0psiwB7xN9NhWpuQTdhvhQO2qewNDbmQhP3pPUuYG m7aaFEAAOFuiH8s1xGkUMxM/jKy8qCmMA8a6EntkDj1LALODvIdzYBzgzAdk4uiqjW4fBwiZQuo nzgvLnOf18BT9c8oy9pFQl0qVfLLc+KK/5ErhAWzeYE3hcSPpoL6XlEdKEy+Y33/OFhi5hBFEjs d76++/Dt76Z+XaiY0muKjCM5Un3ZEVfvSndOLQmpFiTYUEqTjux+zEoyIgt+rbdb4X1CtxCH X-Proofpoint-GUID: L_YyO-VRz5U42y7Nvyj6bm9BrLvwwg2a X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-17_01,2025-07-16_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxscore=0 bulkscore=0 suspectscore=0 lowpriorityscore=0 impostorscore=0 malwarescore=0 clxscore=1015 mlxlogscore=999 priorityscore=1501 phishscore=0 spamscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507170027 On 2025/7/16 18:45, Mike Leach wrote: > Hi, > > On Wed, 16 Jul 2025 at 03:43, Jinlong Mao wrote: >> >> >> >> On 2025/7/3 22:19, Leo Yan wrote: >>> On Thu, Jul 03, 2025 at 09:04:53PM +0800, Mao Jinlong wrote: >>> >>> [...] >>> >>>> +static ssize_t label_show(struct device *dev, >>>> + struct device_attribute *attr, char *buf) >>>> +{ >>>> + >>>> + const char *str; >>>> + int ret = 0; >>> >>> No need to init ret to 0. >>> >>>> + ret = fwnode_property_read_string(dev_fwnode(dev), "label", &str); >>>> + if (ret == 0) >>>> + return scnprintf(buf, PAGE_SIZE, "%s\n", str); >>>> + else >>>> + return ret; >>>> +} >>>> +static DEVICE_ATTR_RO(label); >>>> + >>>> static struct attribute *coresight_sink_attrs[] = { >>>> &dev_attr_enable_sink.attr, >>>> + &dev_attr_label.attr, >>>> NULL, >>>> }; >>>> ATTRIBUTE_GROUPS(coresight_sink); >>>> >>>> static struct attribute *coresight_source_attrs[] = { >>>> &dev_attr_enable_source.attr, >>>> + &dev_attr_label.attr, >>>> NULL, >>>> }; >>>> ATTRIBUTE_GROUPS(coresight_source); >>>> >>>> +static struct attribute *coresight_link_attrs[] = { >>>> + &dev_attr_label.attr, >>>> + NULL, >>>> +}; >>>> +ATTRIBUTE_GROUPS(coresight_link); >>>> + >>>> +static struct attribute *coresight_helper_attrs[] = { >>>> + &dev_attr_label.attr, >>>> + NULL, >>>> +}; >>>> +ATTRIBUTE_GROUPS(coresight_helper); >>>> + >>> >>> This change adds a 'label' entry for source, link, helper, and sink >>> components, but the documentation has only updated for three components: >>> CTI, funnel, and TPDM. >>> >>> Should we also update the documentation for all relevant components, >>> such as ETM, ETR, etc.? >>> >>> Additionally, patch 01 is missing the update to the ETM yaml file for >>> the new property. I checked patch v4 [1], which includes a change to >>> etm.yaml, but this change was dropped since v5. I briefly read the >>> v4 discussion thread and didn't see any mention of removing the ETM >>> related change. Did you see any particular issue when add label for >>> ETM devices? >>> >>> Overall, this series is fine for me. Just please ensure that all >>> relevant components are covered for completeness. >>> >>> Thanks, >>> Leo >>> >> >> I will update all coresight docs. >> >> Thanks >> Jinlong Mao >> >>> [1] https://patchwork.kernel.org/project/linux-arm-msm/cover/20240703122340.26864-1-quic_jinlmao@quicinc.com/ >>> >>>> const struct device_type coresight_dev_type[] = { >>>> [CORESIGHT_DEV_TYPE_SINK] = { >>>> .name = "sink", >>>> @@ -390,6 +420,7 @@ const struct device_type coresight_dev_type[] = { >>>> }, >>>> [CORESIGHT_DEV_TYPE_LINK] = { >>>> .name = "link", >>>> + .groups = coresight_link_groups, >>>> }, >>>> [CORESIGHT_DEV_TYPE_LINKSINK] = { >>>> .name = "linksink", >>>> @@ -401,6 +432,7 @@ const struct device_type coresight_dev_type[] = { >>>> }, >>>> [CORESIGHT_DEV_TYPE_HELPER] = { >>>> .name = "helper", >>>> + .groups = coresight_helper_groups, >>>> } >>>> }; >>>> /* Ensure the enum matches the names and groups */ >>>> -- >>>> 2.17.1 >>>> >>>> _______________________________________________ >>>> CoreSight mailing list -- coresight@lists.linaro.org >>>> To unsubscribe send an email to coresight-leave@lists.linaro.org >> > > Revisiting this - the label DT attribute is purely optional, and > provides context for the hardware instance. > This code as written appears to add a "label" file to all devices, > irrespective of if the label is set in the DT.or not, with blank > labels where the attribute is not present. > The visibility of the sysfs attribute should be controlled so that it > only appears if label is present in the DT. > I will follow this. Thanks Jinlong Mao > Mike >