From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E9AAE2F7AB1; Tue, 2 Dec 2025 23:32:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764718350; cv=none; b=HjX0MxMZj01L0dqhFQHwDWSCLObZt2WtnBoJM0mQqh6pjb6/8i4uLLCCGkPDtQ2Vl3v7T9kH3C8k/Z/kp6Ij0dr2c299lhZf4Xc5zBtIMqCAa+Q/QdK30g4BFyTuSkrr3Dt4psEeHbCvvDIChU7Y8IB2R1rbkg7SoSjKuvxW2Bg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764718350; c=relaxed/simple; bh=FgR+dGAXoqq8Uln8w08gsGEUZzntgHCN6ndnerHSwBQ=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=CYHnZwg9Kn+s6aZL8VIdzhziK/pzePQySjrCXBI2KHs/zOUcSU9S+vEGo2LxKuIH4E1ZBhVrLnwQ7KKehKd/+Uh9MT4nM0SjVXzZTdq1qs+cbMidh/oryHRpgF5MJAHYHUwEUNHhB0oo9NuyPJzdwaYo8JOfiuv/ldHuKKdzJ5w= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=f97PG2Fd; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="f97PG2Fd" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1764718349; x=1796254349; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=FgR+dGAXoqq8Uln8w08gsGEUZzntgHCN6ndnerHSwBQ=; b=f97PG2Fdeg6HHmOhms6OWfEQwXAESQzeTwwFZ2LWDAUkqC1Nnk9NqKmH FQ7wJqgXW+L12s2JEP73B4y7tGAl2bAQy/IgKsa35mLlhZi8gzsteRak0 wd59RU2BfSHmsVbB/v7RZe/yqOp+RZqR/5/LRUfdnsQj2jaP4QBrZapqM F2Mdw/kWKNvMa8if6xpDB71jL86G7ZXwhES6mCdI8r3PM2mazcKB2i/WX 46+xdxTCvlw+/hhjW35zc+niTcdA/Yp2gHes9PWSOfO0OOk0Otz57NDIJ 1Fv5QAxhSDOstGi7Tz8omJSRgi2sFiqz9jp08KeFfjYwJxysQOKcwCyPP A==; X-CSE-ConnectionGUID: 5Ip8D6pkS2mOUd4ebuKpnA== X-CSE-MsgGUID: ClMEtR94TGWqM92uHFHuWA== X-IronPort-AV: E=McAfee;i="6800,10657,11631"; a="89356375" X-IronPort-AV: E=Sophos;i="6.20,244,1758610800"; d="scan'208";a="89356375" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Dec 2025 15:32:28 -0800 X-CSE-ConnectionGUID: 7Wd1OQ3LSTOYg334Vj5lKw== X-CSE-MsgGUID: PE3hF536SX6iI9l3weR3yQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.20,244,1758610800"; d="scan'208";a="195304298" Received: from ldmartin-desk2.corp.intel.com (HELO [10.125.111.202]) ([10.125.111.202]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Dec 2025 15:32:25 -0800 Message-ID: Date: Tue, 2 Dec 2025 16:32:24 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 3/9] dax/hmem: Gate Soft Reserved deferral on DEV_DAX_CXL To: Smita Koralahalli , linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org, nvdimm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-pm@vger.kernel.org Cc: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Yazen Ghannam , Davidlohr Bueso , Matthew Wilcox , Jan Kara , "Rafael J . Wysocki" , Len Brown , Pavel Machek , Li Ming , Jeff Johnson , Ying Huang , Yao Xingtao , Peter Zijlstra , Greg KH , Nathan Fontenot , Terry Bowman , Robert Richter , Benjamin Cheatham , Zhijian Li , Borislav Petkov , Ard Biesheuvel References: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> <20251120031925.87762-4-Smita.KoralahalliChannabasappa@amd.com> From: Dave Jiang Content-Language: en-US In-Reply-To: <20251120031925.87762-4-Smita.KoralahalliChannabasappa@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11/19/25 8:19 PM, Smita Koralahalli wrote: > From: Dan Williams > > Replace IS_ENABLED(CONFIG_CXL_REGION) with IS_ENABLED(CONFIG_DEV_DAX_CXL) > so that HMEM only defers Soft Reserved ranges when CXL DAX support is > enabled. This makes the coordination between HMEM and the CXL stack more > precise and prevents deferral in unrelated CXL configurations. > > Signed-off-by: Dan Williams > Signed-off-by: Smita Koralahalli Reviewed-by: Dave Jiang > --- > drivers/dax/hmem/hmem.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/dax/hmem/hmem.c b/drivers/dax/hmem/hmem.c > index 02e79c7adf75..c2c110b194e5 100644 > --- a/drivers/dax/hmem/hmem.c > +++ b/drivers/dax/hmem/hmem.c > @@ -66,7 +66,7 @@ static int hmem_register_device(struct device *host, int target_nid, > long id; > int rc; > > - if (IS_ENABLED(CONFIG_CXL_REGION) && > + if (IS_ENABLED(CONFIG_DEV_DAX_CXL) && > region_intersects(res->start, resource_size(res), IORESOURCE_MEM, > IORES_DESC_CXL) != REGION_DISJOINT) { > dev_dbg(host, "deferring range to CXL: %pr\n", res);