From: Krzysztof Kozlowski <krzk@kernel.org>
To: Denzeel Oliva <wachiturroxd150@gmail.com>,
Sylwester Nawrocki <s.nawrocki@samsung.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Alim Akhtar <alim.akhtar@samsung.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v5 1/5] clk: samsung: exynos990: Use PLL_CON0 for PLL parent muxes
Date: Sun, 31 Aug 2025 12:54:41 +0200 [thread overview]
Message-ID: <f4f98fd8-2282-491a-81a5-fdbcd91b4035@kernel.org> (raw)
In-Reply-To: <20250830-fix-cmu-top-v5-1-7c62f608309e@gmail.com>
On 30/08/2025 18:28, Denzeel Oliva wrote:
> Parent select bits for shared PLLs are in PLL_CON0, not PLL_CON3.
> Using the wrong register leads to incorrect parent selection and rates.
>
> Fixes: bdd03ebf721f ("clk: samsung: Introduce Exynos990 clock controller driver")
> Signed-off-by: Denzeel Oliva <wachiturroxd150@gmail.com>
I don't remember if I asked, but please add CC-stable in the future.
I added when applying.
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-08-31 10:54 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-30 16:28 [PATCH v5 0/5] clk: samsung: exynos990: CMU_TOP fixes (mux regs, widths, factors) Denzeel Oliva
2025-08-30 16:28 ` [PATCH v5 1/5] clk: samsung: exynos990: Use PLL_CON0 for PLL parent muxes Denzeel Oliva
2025-08-31 10:54 ` Krzysztof Kozlowski [this message]
2025-08-30 16:28 ` [PATCH v5 2/5] clk: samsung: exynos990: Fix CMU_TOP mux/div bit widths Denzeel Oliva
2025-08-30 16:28 ` [PATCH v5 3/5] clk: samsung: exynos990: Replace bogus divs with fixed-factor clocks Denzeel Oliva
2025-08-30 16:28 ` [PATCH v5 4/5] dt-bindings: clock: exynos990: Extend clocks IDs Denzeel Oliva
2025-08-30 16:28 ` [PATCH v5 5/5] clk: samsung: exynos990: Add DPU_BUS and CMUREF mux/div and update CLKS_NR_TOP Denzeel Oliva
2025-08-31 10:55 ` [PATCH v5 0/5] clk: samsung: exynos990: CMU_TOP fixes (mux regs, widths, factors) Krzysztof Kozlowski
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