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([2a10:a5c0:800d:dd00:8fdf:935a:2c85:d703]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-55ba8698372sm1395155e87.166.2025.08.07.23.18.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 07 Aug 2025 23:18:52 -0700 (PDT) Message-ID: Date: Fri, 8 Aug 2025 09:18:52 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 09/10] iio: adc: ad7476: Support ROHM BD79105 To: Andy Shevchenko Cc: Matti Vaittinen , Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , David Lechner , =?UTF-8?Q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: Content-Language: en-US, en-AU, en-GB, en-BW From: Matti Vaittinen In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 08/08/2025 00:28, Andy Shevchenko wrote: > On Thu, Aug 7, 2025 at 11:35 AM Matti Vaittinen > wrote: >> >> The ROHM BD79105 is a simple 16-bit ADC accessible via SPI*. >> >> The BD79105 has a CONVSTART pin, which must be set high to start the ADC >> conversion. Unlike with the ad7091 and ad7091r which also have a >> CONVSTART pin, the BD79105 requires that the pin must remain high also >> for the duration of the SPI access. >> >> (*) Couple of words about the SPI. The BD79105 has pins named as >> CONVSTART, SCLK, DIN and DOUT. For the curious reader, DIN is not SPI >> ISO. >> >> DIN is a signal which can be used as a chip-select. When DIN is pulled >> low, the ADC will output the completed measurement via DOUT as SCLK is >> clocked. According to the data-sheet, the DIN can also be used for >> daisy-chaining multiple ADCs. Furthermore, DOUT can be used also for a >> 'data-ready' -IRQ. These modes aren't supported by this driver. >> >> Support reading ADC scale and data from the BD79105 using SPI, when DIN >> is used as a chip-select. > > ... > >> +static void bd79105_convst_enable(struct ad7476_state *st) >> +{ >> + if (!st->convst_gpio) >> + return; > > Still consider this unneeded churn. 3us delay is tolerable in almost > any setup with this driver. Very simple and 100% clear if (), which avoids uninterruptible busy-wait. I _really_ 100% disagree with you. Luckily Nuno suggested a solution which I think will mitigate the need to fight over this. :) >> + gpiod_set_value(st->convst_gpio, 1); >> + /* Worst case, 2790 nS required for conversion */ > > nS --> ns (SI unit for seconds is 's') > >> + ndelay(2790); >> +} > > ... > >> + /* >> + * The BD79105 starts ADC data conversion when the CONVSTART line is >> + * set HIGH. The CONVSTART must be kept HIGH until the data has been >> + * read from the ADC. > > Is this terminology in absolute levels of the pin or logical ones > (that implied active-low)? If it's the latter, use active/inactive > instead as the GPIO subsystem does. Ah. This is electrical high. I have: adi,conversion-start-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; in the DT. Open to suggestions how to make this more obvious. Thanks! Yours, -- Matti