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From: Baolu Lu <baolu.lu@linux.intel.com>
To: "Tian, Kevin" <kevin.tian@intel.com>,
	"iommu@lists.linux.dev" <iommu@lists.linux.dev>
Cc: baolu.lu@linux.intel.com, Joerg Roedel <joro@8bytes.org>,
	Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	"Liu, Yi L" <yi.l.liu@intel.com>,
	"Pan, Jacob jun" <jacob.jun.pan@intel.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/7] iommu/vt-d: Use device_block_translation() in dev_attach error path
Date: Sat, 5 Nov 2022 10:09:44 +0800	[thread overview]
Message-ID: <f6ee3ad3-0e75-2bc0-d03d-c2456ed6620a@linux.intel.com> (raw)
In-Reply-To: <BN9PR11MB52763EB6CDF2E171210D04E48C3B9@BN9PR11MB5276.namprd11.prod.outlook.com>

On 2022/11/4 10:18, Tian, Kevin wrote:
>> From: Lu Baolu <baolu.lu@linux.intel.com>
>> Sent: Thursday, November 3, 2022 1:53 PM
>>
>> If domain attaching to device fails, the IOMMU driver should bring the
>> device to blocking DMA state. The upper layer is expected to recover it
>> by attaching a new domain. Use device_block_translation() in the error
>> path of dev_attach to make the behavior specific.
>>
>> The difference between device_block_translation() and the previous
>> dmar_remove_one_dev_info() is that the latter disables PCIe ATS and the
>> related PCIe features. This is unnecessary as these features are not per
>> domain capabilities, disabling them during domain switching is
>> unnecessary.
> 
> well, the opposite argument is that when the DMA is blocked what is
> the point of enabling ATS/PRI on the device.

It's not "DMA is blocked", but "DMA without PASID is blocked". :-)

As above term implies, it's conceptually incorrect to disable ATS/PRI
only because DMA without PASID is about to blocked.

> 
> btw this change is partial. @attach_dev still calls iommu_enable_pci_caps()
> which always tries to enable PCI capabilities w/o checking whether they
> have been enabled or not. Then user will hit -EBUSY when related PCI
> helpers are called.

Good catch!

How about moving iommu_enable/disable_pci_caps() into
iommu_probe/release_device() path? I may look into details if there's no
significant arch gaps.

> 
> another difference worthy of pointing out is that in scalable mode it is
> the RID2PASID entry instead of context entry being cleared.

Yes. Will update the commit message.

Best regards,
baolu

  reply	other threads:[~2022-11-05  2:09 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-03  5:53 [PATCH 0/7] iommu/vt-d: Some cleanups Lu Baolu
2022-11-03  5:53 ` [PATCH 1/7] iommu/vt-d: Allocate pasid table in device probe path Lu Baolu
2022-11-04  2:06   ` Tian, Kevin
2022-11-05  1:09     ` Baolu Lu
2022-11-05  1:33       ` Tian, Kevin
2022-11-03  5:53 ` [PATCH 2/7] iommu/vt-d: Add blocking domain support Lu Baolu
2022-11-04  2:11   ` Tian, Kevin
2022-11-05  1:54     ` Baolu Lu
2022-11-03  5:53 ` [PATCH 3/7] iommu/vt-d: Use device_block_translation() in dev_attach error path Lu Baolu
2022-11-04  2:18   ` Tian, Kevin
2022-11-05  2:09     ` Baolu Lu [this message]
2022-11-05  2:59       ` Baolu Lu
2022-11-03  5:53 ` [PATCH 4/7] iommu/vt-d: Fold dmar_remove_one_dev_info() into its caller Lu Baolu
2022-11-03  5:53 ` [PATCH 5/7] iommu/vt-d: Rename domain_add_dev_info() Lu Baolu
2022-11-03  5:53 ` [PATCH 6/7] iommu/vt-d: Remove unnecessary domain_context_mapped() Lu Baolu
2022-11-04  2:19   ` Tian, Kevin
2022-11-03  5:53 ` [PATCH 7/7] iommu/vt-d: Use real field for indication of first level Lu Baolu
2022-11-04  2:20   ` Tian, Kevin

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