From: Chris Wilson <chris@chris-wilson.co.uk>
To: Keith Packard <keithp@keithp.com>, Dave Airlie <airlied@redhat.com>
Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org,
Keith Packard <keithp@keithp.com>
Subject: Re: [PATCH 7/9] drm/i915: Use CK505 as non-SSC source where available
Date: Tue, 27 Sep 2011 17:49:39 +0100 [thread overview]
Message-ID: <f80fcd$20puj0@fmsmga001.fm.intel.com> (raw)
In-Reply-To: <1317103906-4649-8-git-send-email-keithp@keithp.com>
On Mon, 26 Sep 2011 23:11:44 -0700, Keith Packard <keithp@keithp.com> wrote:
> This eliminates VGA shimmer on some Ironlake machines which have a
> CK505 clock source.
>
> Signed-off-by: Keith Packard <keithp@keithp.com>
References: https://bugzilla.kernel.org/show_bug.cgi?id=21742
References: https://bugs.freedesktop.org/show_bug.cgi?id=38750
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
next prev parent reply other threads:[~2011-09-27 16:49 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <yunbou6lxb4.fsf@aiko.keithp.com>
2011-09-27 6:11 ` PCH reference clock cleanups Keith Packard
2011-09-27 6:11 ` [PATCH 1/9] drm/i915: broken copyright encoding in intel_bios.c Keith Packard
2011-09-27 6:11 ` [PATCH 2/9] drm/i915: Use DRM_DEBUG_KMS for all messages " Keith Packard
2011-09-27 16:39 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 3/9] drv/i915: Pull display_clock_mode out of VBT table Keith Packard
2011-09-27 16:40 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 4/9] drm/i915: Document a few more BDB_GENERAL_FEATURES bits from PCH BIOS Keith Packard
2011-09-27 6:11 ` [PATCH 5/9] drm/i915: Allow SSC parameter to override VBT value Keith Packard
2011-09-27 16:41 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 6/9] drm/i915: Fix PCH SSC reference clock settings Keith Packard
2011-09-27 16:47 ` Chris Wilson
2011-09-27 18:03 ` Keith Packard
2011-09-28 9:09 ` Chris Wilson
2011-09-28 16:36 ` Keith Packard
2011-09-27 6:11 ` [PATCH 7/9] drm/i915: Use CK505 as non-SSC source where available Keith Packard
2011-09-27 16:49 ` Chris Wilson [this message]
2011-09-27 6:11 ` [PATCH 8/9] drm/i915: All PCH refclks are 120MHz Keith Packard
2011-09-27 16:53 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 9/9] drm/i915: Initialize PCH refclks at modeset init time Keith Packard
2011-09-27 16:56 ` Chris Wilson
2011-09-27 18:11 ` Keith Packard
2011-10-03 21:12 ` [Intel-gfx] " Jesse Barnes
2011-09-28 23:15 ` Keith Packard
2011-09-27 9:01 ` PCH reference clock cleanups Chris Wilson
2011-09-27 16:54 ` Keith Packard
2011-09-28 18:22 ` [Intel-gfx] " Paulo Zanoni
2011-09-28 20:02 ` Keith Packard
2011-10-03 21:14 ` Jesse Barnes
2011-10-03 23:18 ` Keith Packard
2011-10-03 23:21 ` Jesse Barnes
2011-10-03 23:39 ` Keith Packard
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