Re: [PATCH v2] of: property: Create devlink between PCI Host bridge and Root Port supplies

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 5/6/26 9:56 AM, Manivannan Sadhasivam wrote:
> Recently, devicetree started to represent the PCI Host bridge supplies like
> PHY in the Root Port nodes as seen in commit 38fcbfbd4207
> ("dt-bindings: PCI: qcom: Move PHY & reset GPIO to Root Port node"). But
> the Host bridge drivers still control the Root Port supplies as a part of
> their controller initialization/deinitialization sequence.
> 
> So the Host bridge drivers end up parsing the Root Port supplies in their
> probe() and control them. A downside to this approach is that the devlink
> dependency between the suppliers and Host bridge is completely broken. Due
> to this, the driver core probes the Host bridge drivers even if the
> supplies are not ready, causing probe deferrals and setup teardowns in
> Host bridge probe().
> 
> These probe deferrals sometime happen over 1000 times (as reported in Qcom
> Glymur platform) leading to a waste of CPU resources and increase in boot
> time. So to fix these unnecessary deferrals, create devlink between the
> Host bridge and Root Port supplies in of_fwnode_add_links(). This will
> allow the driver core to probe the Host bridge drivers only when all Root
> Port supplies are available.
> 
> Reported-by: Bjorn Andersson <andersson@kernel.org>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
> ---

[...]

> +	/*
> +	 * Since the host bridge drivers parse and control the Root Port
> +	 * supplies, create a devlink between host bridge and Root Port
> +	 * supplies. This will prevent the host bridge drivers from being
> +	 * probed before the supplies become available.
> +	 *
> +	 * For checking the host bridge node, first ensure that it is a PCI node
> +	 * and its parent is not a PCI node. Only host bridge nodes will have
> +	 * this structure.
> +	 */
> +	if (of_node_is_type(con_np, "pci") && !of_node_is_type(con_np->parent, "pci")) {
> +		for_each_available_child_of_node_scoped(con_np, child) {
> +			if (of_node_is_type(child, "pci")) {

Doesn't this go a level too deep now? (a change vs v1)

for example, in x1e80100.dtsi:

con_np = &pcie3_port0
con_np->parent = &pcie3

And I think the code now looks for device(such that device_type="pci")
*under* &pcie3_port0

Konrad

> +				for_each_property_of_node(child, p)
> +					of_link_property(child, con_np, p->name);
> +			}
> +		}
> +	}
>  
>  	return 0;
>  }